Adaptive-Threshold Capacitive Logic Gate for Lower-Power Multi-Input Logic
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Solution Overview
Problem
Existing circuit architectures for multi-input logic gates consume high power due to the increasing number of transistors, which poses a challenge in achieving lower power consumption, especially in battery-powered devices.
Innovation Solution
A capacitive input circuit with a configurable threshold is introduced, where digital inputs are received by capacitors, and the switching threshold is adjusted by controlling pull-up and pull-down devices during a reset phase, allowing the circuit to perform different logic functions during the evaluation phase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional multi-input logic gates are implemented with increasing number of transistors, then logic functionality is achieved, but power consumption increases
Solution Approach 1:
The patent implements a universal capacitive input circuit that can perform multiple logic gate functions (AND, OR, NAND, NOR, etc.) by configuring the same physical circuit with different capacitor connections and threshold settings, eliminating the need for separate transistor-based logic gates for each function. This multi-functionality directly reduces power consumption while maintaining logical capability.
Solution Approach 2:
The patent replaces the traditional transistor-based mechanical switching system with a capacitive system that uses voltage threshold comparison. Instead of using multiple transistors to implement logic functions, the invention uses capacitive voltage division and comparison against a threshold voltage, substituting the transistor switching mechanism with a fundamentally different physical approach that consumes less power.
2Adaptability or versatility
If a capacitive input circuit with configurable threshold is used, then power consumption is reduced and multi-functionality is achieved, but circuit configuration complexity increases
Solution Approach 1:
The patent introduces dynamic configurability to the capacitive input circuit through a threshold voltage generator that can adjust the reference threshold voltage based on desired logic function. This dynamic adjustment allows the same static circuit topology to perform different logic operations, managing configuration complexity through controlled adaptability rather than fixed complex interconnections.
Solution Approach 2:
The patent manages circuit complexity by changing the threshold voltage parameter rather than reconfiguring the entire circuit structure. By adjusting the threshold voltage level generated by the threshold voltage generator, the same capacitive circuit can implement different logic functions, simplifying the overall configuration compared to traditional approaches that would require structural changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption by allowing the same capacitive input circuit to function as various logic gates (such as AND/NAND, OR/NOR, etc.) with minimal changes in circuit configuration, thereby optimizing power usage.
Implementation Method 1
a first terminal of a first capacitor (C1) is coupled to a first digital input (in1), a second terminal of the first capacitor (C1) is coupled to a summing node (n1)
Data Source
AI summary
An apparatus and configuring scheme where a capacitive input circuit can be programmed to perform different logic functions by adjusting the switching threshold of the capacitive input circuit. Digital inputs are received by respective capacitors on first terminals of those capacitors. The second terminals of the capacitors are connected to a summing node. A pull-up and pull-down device are coupled to the summing node. The pull-up and pull-down devices are controlled separately. During a reset phase, the pull-up and/or pull-down devices are turned on or off in a sequence, and inputs to the capacitors are set to condition the voltage on node n1. As such, a threshold for the capacitive input circuit is set. After the reset phase, an evaluation phase follows. In the evaluation phase, the output of the capacitive input circuit is determined based on the inputs and the logic function configured during the reset phase.