Adaptive-Threshold Validity Tree for Low-Voltage Asynchronous Logic

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Solution Overview

Problem

Existing asynchronous logic circuits face challenges in operating efficiently at low voltage conditions due to the need for stacks of transistors between power supply and ground rails, leading to increased complexity and power consumption.

Innovation Solution

The development of asynchronous circuits using threshold gates and capacitive input circuits with adjustable thresholds, implemented using linear or nonlinear capacitors, which reduce the stack of devices and enable operation at lower power supply levels, achieving area reduction and higher throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional asynchronous logic uses stacks of transistors between power supply and ground rails, then logic functionality is achieved, but device complexity and power consumption increase

Engineering Contradiction:
Improvetransistor stack complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent merges the threshold function and logic function into a single threshold gate device. The capacitive input circuit with adjustable threshold directly implements logic operations without requiring separate transistor stacks for each logic function, thereby reducing device complexity and power consumption while maintaining asynchronous operation capabilities

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The threshold gate with capacitive input serves multiple functions: it performs threshold-based logic operations, provides asynchronous signal processing, and enables configurable logic functions through adjustable threshold values. This multi-functionality eliminates the need for dedicated transistor stacks for different logic operations, reducing overall circuit complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If traditional asynchronous circuits use fixed transistor stacks, then circuit operation is achieved, but area requirements increase

Engineering Contradiction:
ImprovethroughputVSAvoidcircuit area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

By combining the threshold detection and logic processing functions into a single capacitive input threshold gate, the patent reduces the number of discrete components required. This integration decreases the overall circuit area while maintaining high throughput capabilities through efficient asynchronous operation

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs adjustable threshold parameters in the capacitive input circuit to optimize logic function implementation. By dynamically adjusting the threshold value, the circuit can efficiently handle different logic operations without requiring additional hardware, thereby reducing area requirements while maintaining high productivity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution results in asynchronous circuits that can operate effectively at lower power supply levels, reducing area requirements and increasing throughput by up to 2 times compared to traditional asynchronous circuits, while allowing for flexible logic function implementation.

Implementation Method 1

capacitive input circuits with adjustable thresholds, implemented using linear or nonlinear capacitors

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11863184B1Asynchronous validity tree circuit using multi-function threshold gate with input based adaptive threshold
Publication Date: 2024.01.02 KEPLER COMPUTING INC
  • US11863184B1 patent drawing
  • US11863184B1 patent drawing
  • US11863184B1 patent drawing

AI summary

Asynchronous circuit elements are described. Asynchronous circuit elements include a consensus element (c-element), completion tree, and validity tree. The c-element is implemented using adjustable threshold based multi-input capacitive circuitries. The completion tree comprises a plurality of c-elements organized in a tree formation. The validity tree comprises OR gates followed by c-elements. The multi-input capacitive circuitries include capacitive structures that may comprise linear dielectric, paraelectric dielectric, or ferroelectric dielectric. The capacitors can be planar or non-planar. The capacitors may be stacked vertically to reduce footprint of the various asynchronous circuitries.