Adaptive Voltage Margin Control for Heterogeneous SoCs

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Solution Overview

Problem

Power management systems face challenges in maintaining voltage margin while minimizing power consumption across heterogeneous components in computing devices, particularly in systems-on-a-chip and graphics processors with varying power characteristics.

Innovation Solution

Adaptive voltage control circuitry that adjusts supply voltage based on component activity and junction voltage measurements, incrementally lowering voltage when possible, and adding margin only when necessary, using sensors and controllers to manage voltage ceilings and floors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If voltage margin is increased to protect against voltage droops and processing errors, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvevoltage marginVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic voltage margin adjustment where the voltage ceiling is not fixed but adapts based on real-time component activity states. The power management circuitry continuously monitors whether components are in idle or active states and adjusts the voltage ceiling accordingly, transitioning from static to dynamic control to optimize the trade-off between reliability and power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies different voltage margin levels to different components based on their individual activity states. Each component can have its own voltage ceiling adjustment independent of others, allowing localized optimization where voltage margin is provided only to active components that need it, rather than uniformly across all components.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If voltage ceiling is lowered to reduce power consumption, then energy efficiency is improved, but voltage stability deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage stability
Core Design Contradiction:
Use of energy by moving objectVSStability of the object's composition

Solution Approach 1:

The patent employs feedback mechanisms where the power management circuitry monitors component activity states and uses this information to adjust the voltage ceiling. The system continuously senses whether components are idle or active and feeds this information back to the voltage control logic, which then appropriately raises or lowers the voltage ceiling to maintain stability when needed while reducing power when possible.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent adjusts the voltage ceiling in advance based on predicted or detected component activity. When idle state is detected, the voltage ceiling is lowered preemptively to save power. When active state is detected, the voltage ceiling is raised in advance to ensure voltage stability before the component actually needs to operate, preventing voltage droops before they occur.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12498781B2Adaptive voltage margin techniques
Publication Date: 2025.12.16 APPLE INC
  • US12498781B2 patent drawing
  • US12498781B2 patent drawing
  • US12498781B2 patent drawing

AI summary

Techniques are disclosed relating to power control and voltage margining. In some embodiments, first and second component circuits operate based on a supply voltage generated by a power supply. Voltage sensor circuitry may generate voltage measurements. Voltage margin control circuitry may determine a voltage ceiling based on a current operating state of the first component circuit and a current operating state of the second component circuit. The control circuitry may transmit control signals to the power supply to incrementally reduce the supply voltage until detecting a low-supply-voltage condition based on a voltage measurement generated by the voltage sensor circuitry. Disclosed techniques may advantageously provide voltage margin while reducing overall power consumption.