A masked battery reserve preserves power for emergency calls, GPS sharing, alarms, and other critical functions after normal phone use is cut off.
Dynamic voltage ceilings and sensor feedback cut SoC power use while preserving margin against droops and low-voltage errors.
A low-power core monitors wake words while the main OS sleeps, cutting wearable voice standby energy without losing response readiness.
Dynamic client voltage reduction uses current profiles to avoid droop while cutting excess power, heat, and component wear.
Double-threshold GPU frequency capping lets LLM inference clusters add server capacity within fixed datacenter power budgets while maintaining SLOs.
A voltage-triggered switching circuit releases device identification only within a defined range, enabling secure USB access without dedicated readers.
A backup power unit keeps memory alive after shutdown, then triggers irreversible timed erasure to protect sensitive data without encryption.
EC firmware lowers USB sink FET current during voltage equalization, then raises it to prevent inrush thermal trips and damage.
Scheduled target values and randomized switching let parallel IC chips adjust power modes without synchronized surges that destabilize the grid.
Staggered processor startup with power-on control circuitry cuts peak power draw, protecting datacenter power sources from overload.
Signal changes at server power supplies identify PDU port connections in real time, avoiding downtime and exposing cabling errors early.
Power-value arrays from TV sensors feed a cross-device ML model to detect active state accurately despite differing display power patterns.
A command-based approach retrieves power data from selected network units, improving resource management without adding heavy system complexity.
A battery controller keeps only the touch sensor powered in standby, then wakes the PMIC after a designated input to replace a physical power key.
Accelerator workload signals trigger DVFS in the compute circuit, cutting voltage and clock frequency during low packet activity to save power.
Selective touch-area power control in a rollable TSP improves boundary touch accuracy while cutting unnecessary power use.
Pattern data is written and read back at power-on to tune RAM parameters when error bits exceed a threshold, improving startup reliability.
Selective clock activation across command fetch, DMA, and interrupt phases cuts unnecessary NVMe controller power use while keeping queue handling responsive.
An embedded controller monitors standby entry, releases SoC-held hardware resources, and prevents failed low-power transitions and data loss.
Filtered media access events and relative power values let one counter estimate VM media power for smarter thermal and performance control.
Tx, Rx, and listen time tracking estimates WLAN power use, enabling thermal mitigation in power-constrained AR, VR, and MR devices.
A movable tray and slot extend data flush time during host power loss, helping storage hardware protect data integrity.
Dynamic power budgeting reallocates peak limits between the controller and components to prevent battery voltage droop and shutdowns.
A checkpoint-progress indicator enables partial execution state storage during power drops, cutting redundant writes, energy use, and recovery loss.
Current profiling with a precision resistor and BMC detects missing, required, or unauthorized ICs on circuit boards without visual inspection.
Aggregated load-current signals let processor power circuits lower no-load voltage, cutting power use and gate-oxide stress while managing droop.
A temperature and current monitored output port keeps its visual warning active after restart until manual reset, preventing missed inspections.
During host power loss, a tray sliding along a slot extends data flush time so auxiliary power and BMC commands can protect stored data.