Adaptive Voltage Control for Timing-Borrowing Register Paths
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Solution Overview
Problem
Existing methods for addressing time borrowing in microelectronic circuits, such as extending clock cycles or increasing operating voltage, face challenges in efficiently canceling propagation delays and preventing data errors, especially when synchronized I/O ports or other constraints are present.
Innovation Solution
A system that rapidly increases the operating voltage of a microelectronic circuit in response to timing event observation signals, allowing for immediate correction of propagation delays and data errors, using a controllable voltage source to regulate the operating voltage into conformity with a new target value, thereby canceling the effects of time borrowing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the operating voltage is increased to shorten propagation delays and cancel time borrowing effects, then the timing reliability is improved, but the energy consumption increases significantly
Solution Approach 1:
The patent applies periodic action by using pulse-width modulation (PWM) to switch between different voltage levels. The voltage is not continuously high but is switched on and off at high frequency, creating an effective average voltage that maintains timing reliability while reducing energy consumption compared to continuously high voltage operation.
Solution Approach 2:
The patent implements dynamics by making the operating voltage adjustable and time-dependent. The voltage regulator can dynamically switch between different voltage levels (e.g., first voltage level for normal operation, second voltage level for timing correction) based on the timing requirements of the circuit, allowing the system to adapt its power consumption to actual needs.
2Speed
If the operating voltage is rapidly increased to cancel time borrowing effects immediately, then the timing correction speed is improved, but the voltage regulation stability deteriorates due to the time constant of the voltage source
Solution Approach 1:
The patent uses periodic PWM switching to achieve rapid voltage changes without violating the voltage source's time constant constraints. By switching at a frequency much higher than the voltage regulation bandwidth, the system creates the appearance of rapid response while the actual voltage changes occur at a controlled rate determined by the regulator's time constant.
Solution Approach 2:
The patent applies preliminary action by pre-charging capacitor banks to different voltage levels before they are needed. When rapid voltage change is required, the system switches between pre-charged capacitors rather than charging from scratch, effectively bypassing the voltage regulator's time constant and achieving immediate voltage transition.
3Reliability
If the clock cycle is extended to accommodate late data values, then the timing margin is improved, but the system productivity decreases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the voltage level parameter rather than changing the clock cycle parameter. When timing violations occur, the system increases the operating voltage to shorten propagation delays, allowing the clock cycle to remain short and productivity to be maintained while still achieving adequate timing margins.
Data Source
AI summary
A controllable voltage source (902) is coupled to a microelectronic circuit (901) for providing an operating voltage. Said microelectronic circuit (901) is adaptive, so its performance is at least partly configurable by value of said operating voltage. The operating voltage is regulated into conformity with a target value. Reregulating said operating voltage into conformity with a new target value involves a time constant. On a processing path a first register circuit (502) comprises a data input coupled to an output of a preceding first logic unit (501). The microelectronic circuit (901) responds to a digital value at said data input changing later than an allowable time limit by generating a timing event observation (TEO) signal. The allowable time limit is defined by at least one triggering edge of at least one triggering signal coupled to the first register circuit (502). The system uses said TEO signal to trigger an increase in said operating voltage faster than said time constant.