On-Chip ADC Calibration Switching for Interleave Error Correction
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Solution Overview
Problem
Existing Analog-to-Digital Converter (ADC) calibration methods require expensive and elaborate external setups, leading to high costs and inefficiencies due to manufacturing process variations causing interleave errors that degrade Signal-to-Noise Ratio (SNR).
Innovation Solution
An on-chip circuit and calibration algorithm that allows for self-calibration by disconnecting the in-service signal and connecting an internal calibration source to the ADC channels, enabling the detection and correction of interleave errors without external equipment, using either synchronous or asynchronous signals and performing calibration in the frequency or time domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external calibration setups with synthesizers and test equipment are used, then ADC calibration accuracy is improved, but manufacturing cost and system complexity increase significantly
Solution Approach 1:
The calibration function is extracted from the external test equipment and integrated directly into the ADC chip as an on-chip calibration circuit. This includes embedding a calibration signal generator and calibration logic within the ADC, eliminating the need for external synthesizers and test equipment while maintaining calibration accuracy.
Solution Approach 2:
The on-chip calibration circuit serves multiple functions: it generates calibration signals, performs the calibration measurement, and stores calibration data within the ADC itself. This multi-functional integration replaces multiple external devices (signal generator, test equipment, data storage) with a single integrated solution.
2Manufacturing precision
If external calibration equipment and test beds are deployed, then ADC interleave errors are corrected, but manufacturing cost increases due to expensive equipment and human intervention
Solution Approach 1:
The ADC performs its own calibration automatically using the on-chip calibration circuit. The calibration signal generator produces test signals, the ADC measures its own performance parameters, and the results are stored in on-chip memory. This self-calibration capability eliminates the need for external test equipment and manual calibration procedures, significantly reducing manufacturing costs.
Solution Approach 2:
The calibration is performed automatically during the manufacturing process before the ADC leaves the fabrication plant. The on-chip calibration circuit measures and compensates for interleave errors in advance, so that when the ADC is deployed, it is already calibrated and requires no additional external equipment or human intervention.
3Reliability
If synchronous sinusoidal signals are injected from external sources for calibration, then ADC performance is improved, but the calibration process becomes expensive and time-consuming
Solution Approach 1:
The calibration is performed automatically during the manufacturing process before the ADC leaves the fabrication plant. The on-chip calibration circuit measures and compensates for interleave errors in advance, so that when the ADC is deployed, it is already calibrated and requires no additional external equipment or human intervention.
Solution Approach 2:
The calibration signal generator produces periodic sinusoidal test signals at specific frequencies to excite the ADC channels. By using periodic signals with known characteristics, the calibration process can efficiently measure gain, offset, and timing errors through standard signal processing techniques, achieving accurate calibration quickly.
Data Source
AI summary
An Analog-to-Digital Converter (ADC) includes a plurality of ADC channels connected to an in-service signal input via an isolated power combiner; an on-chip circuit including a calibration source connected to the isolated power combiner; and one or more switches configured to switch the ADC between an in-service mode and a calibration mode. The one or more switches are set such that, in the calibration mode, the in-service signal input is disconnected and the on-chip circuit is connected to the isolated power combiner, and, in the in-service mode, the in-service signal input is connected and the on-chip circuit is disconnected to the isolated power combiner. In the calibration mode, the on-chip circuit is configured to provide a test signal to the plurality of ADC channels for a determination of interleave errors in the plurality of ADC channels.