Configurable ADC Data Pipes for Noise-Canceling Receivers

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Solution Overview

Problem

Multi-pipeline data processors face inefficiencies when not all data pipes are actively used, leading to idle functionality that does not contribute to system performance or functionality, particularly in receiving multiple analogue input signals and providing digital output signals.

Innovation Solution

The processor incorporates a configurable pipeline multiplexer that allows idle analogue-to-digital converters to process reference signals, which are then used to improve noise cancellation and system performance by configuring active data pipes to adapt bandwidth, power, and frequency response, and to detect spurious frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple data pipes are provided in the processor, then the system can receive multiple analogue input signals simultaneously, but idle data pipes do not contribute to system performance and waste resources

Engineering Contradiction:
Improvecapability to receive multiple analogue input signalsVSAvoidpower consumption of idle data pipes
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent makes idle data pipes multi-functional by enabling them to perform noise cancellation and spurious signal detection in addition to their primary signal processing function. The configurable pipeline multiplexer allows idle ADCs to process reference signals from active data pipes, transforming wasted resources into useful noise reference signals that improve overall system performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If idle data pipes are used for processing reference signals, then noise cancellation and spurious frequency detection are improved, but the device complexity increases due to additional multiplexing configuration

Engineering Contradiction:
Improvenoise cancellation performanceVSAvoidconfigurable pipeline multiplexer configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The configurable pipeline multiplexer acts as an intermediary that dynamically routes reference signals from active data pipes to idle data pipes. This multiplexer provides a flexible, reconfigurable connection that enables noise cancellation functionality without requiring permanent dedicated hardware paths, thus managing complexity while improving reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If configurable pipeline multiplexer is used to route reference signals to idle ADCs, then system functionality is enhanced, but the control complexity for configuring data pipes increases

Engineering Contradiction:
Improvesystem functionalityVSAvoidcontrol complexity for configuring data pipes
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The system implements self-service through automatic configuration mechanisms where the processor dynamically assigns idle data pipes to handle noise cancellation and spurious signal detection based on current operational needs. The configurable pipeline multiplexer is automatically controlled by the processor to route appropriate reference signals, eliminating the need for manual configuration and reducing operational complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10098146B2Data processor
Publication Date: 2018.10.09 NXP BV
  • US10098146B2 patent drawing
  • US10098146B2 patent drawing
  • US10098146B2 patent drawing

AI summary

A processor is disclosed. The processor includes a first-receiver-node for receiving a first-receiver-signal, a second-receiver-node for receiving a second-receiver-signal, a first-output-node for coupling to a digital-baseband-processor, a second-output-node for coupling to the digital-baseband-processor and a first-active-data-pipe extending between the first-receiver-node and the first-output-node. The first-active-data-pipe includes a first-analog-to-digital-converter comprising a first-ADC-input coupled to the first-receiver-node and a first-ADC-output coupled to the first-output-node. The first-analog-to-digital-converter is configured to provide a first-digital-signal to the first-output-node. The processor comprises a first-reference-node and a configurable-data-pipe extending between the second-receiver-node and the second-output-node.