Capacitor-Array ADC Dithering for Lower DNL and No Missing Codes
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Solution Overview
Problem
Analog to digital converters face challenges in achieving optimal differential non-linearity and minimizing missing codes due to process variations and limitations in physical accuracy, leading to differential non-linearity errors and increased complexity in existing solutions.
Innovation Solution
A switched capacitor array with a second group of capacitors for applying dither, controlled by a sequence generator, is used to perturb the sampled input, improving differential non-linearity and ensuring no missing codes by scattering the converted result across multiple bins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a standard ADC is used without additional circuitry, then the device complexity is low, but differential non-linearity errors occur due to unequal bin widths
Solution Approach 1:
The dithering function is merged with the existing capacitor array by designating a second group of capacitors within the same array to provide dither, rather than using separate external circuitry. This combines the dithering function with the existing conversion infrastructure, reducing overall device complexity while improving differential non-linearity.
Solution Approach 2:
The capacitor array serves multiple functions: the first group of capacitors performs the primary successive approximation conversion, while the second group of capacitors provides dithering. This multi-functionality allows a single component structure to address both conversion and linearity improvement needs.
2Manufacturing precision
If external dithering circuitry is added to minimize DNL errors, then differential non-linearity improves, but the circuit complexity increases and additional offset and gain errors are introduced
Solution Approach 1:
The dithering function is merged with the existing capacitor array by designating a second group of capacitors within the same array to provide dither, rather than using separate external circuitry. This combines the dithering function with the existing conversion infrastructure, reducing overall device complexity while improving differential non-linearity.
3Manufacturing precision
If a switched capacitor array with dither is used, then differential non-linearity errors are reduced and missing codes are eliminated, but the capacitor array complexity increases
Solution Approach 1:
The capacitor array is segmented into two distinct groups: a first group of capacitors dedicated to successive approximation conversion and a second group of capacitors dedicated to dithering. This segmentation allows each group to be optimized for its specific function while working together to improve overall ADC performance.
Solution Approach 2:
The capacitor array serves multiple functions: the first group of capacitors performs the primary successive approximation conversion, while the second group of capacitors provides dithering. This multi-functionality allows a single component structure to address both conversion and linearity improvement needs.
Data Source
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AI summary
An analog to digital converter is provided comprising an array of capacitors for sampling an input, each capacitor having at least one associated switch for controllably connecting a terminal of the capacitor to a first reference voltage or to a second reference voltage; and a sequence generator for generating a sequence of bits, wherein during sampling of the input onto the array of capacitors an output of the sequence generator is supplied to the switches of a first group of capacitors to control whether a given capacitor within the first group is connected by its associated switch to the first reference voltage or to the second reference voltage.