On-Chip ADC Dynamic Testing With Built-In Sine Wave Generation
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Solution Overview
Problem
The existing methods for testing Analog-to-Digital Converters (ADCs) rely on external tester equipment, which increases testing costs and limits parallelism, making it difficult to achieve high test efficiency during production and post-production.
Innovation Solution
An integrated circuit (IC) with a built-in test circuit capable of performing on-chip ADC performance testing, including dynamic testing by generating a coherent staircase sine wave, which eliminates the need for external testers and allows for testing during production and post-production.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external tester equipment is used for ADC testing, then measurement precision can be achieved, but device complexity and testing cost increase
Solution Approach 1:
The ADC testing system performs self-testing by generating test signals internally through a signal generator and analyzing the ADC output through a spectrum analyzer integrated in the same device. This eliminates the need for external tester equipment while maintaining measurement precision through built-in self-test circuitry
Solution Approach 2:
The signal generator is designed to generate multiple types of test signals (sine waves, staircase waves, random sequences) and the system can test multiple ADC channels simultaneously. This multi-functional approach allows a single device to perform various ADC testing functions that previously required separate external equipment
2Measurement precision
If external tester equipment is used for ADC testing, then measurement precision is maintained, but productivity decreases due to limited test parallelism
Solution Approach 1:
The testing system is divided into independent functional modules including signal generator, spectrum analyzer, and multiple ADC test channels. Each channel can operate independently and simultaneously, enabling parallel testing of multiple ADCs without interfering with measurement precision through modular architecture
Solution Approach 2:
The system transitions from sequential single-channel testing to multi-dimensional parallel testing by adding multiple independent test channels that can simultaneously evaluate multiple ADC devices. This dimensional expansion from 1D to ND testing dramatically increases productivity while maintaining precision through synchronized operation
3Productivity
If built-in self-test circuitry is implemented, then productivity increases through high parallelism, but device complexity increases
Solution Approach 1:
The signal generator and spectrum analyzer functions are merged into the same integrated circuit device along with the ADC under test. This consolidation enables high test parallelism by allowing multiple ADC channels to be tested simultaneously within a single chip, reducing the need for external equipment while managing complexity through integration
Solution Approach 2:
The test circuitry is nested within the ADC device structure, with the signal generator and spectrum analyzer functions integrated into the same chip as the ADC channels. This nested architecture allows the testing functionality to be embedded within the device being tested, achieving high parallelism while containing complexity within a unified integrated structure
Data Source
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AI summary
An integrated circuit device includes a digital sine wave generator configured to produce portions of a digital sine wave, a combiner circuit configured to output each of the portions of the digital sine wave combined with a respective calibration code during operation in a post-production dynamic test mode, a digital to analog converter (DAC) configured to output an analog sine wave based on the output of the combiner circuit, and a test analog to digital converter (ADC) including an input terminal directly connected to the output of the DAC, and configured to generate a second digital sine wave based on the analog sine wave.