ADC Fault Detection Using Redundant Channel Comparison

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing systems face challenges in ensuring the integrity and reliability of analog input signals, particularly in industrial automation, where redundant circuits or external monitors are costly and power-intensive, making it difficult to detect and respond to abnormal signals effectively.

Innovation Solution

An integrated circuit with a programmable clock circuit and an analog-to-digital converter (ADC) that operates in on-demand or input-driven modes, automatically reconfiguring to perform redundant comparisons and set a safety fault flag if error tolerance is exceeded, reducing the need for redundant monitor circuits and allowing continuous digital output usage during error checking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redundant circuits or external monitors are used to ensure signal integrity, then reliability is improved, but power consumption and cost increase

Engineering Contradiction:
Improvesignal integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines the ADC functionality with integrated error checking and fault detection capabilities within a single device. The result comparison circuit is merged with the ADC, allowing the ADC to perform self-diagnosis and compare its own outputs without requiring separate external monitor circuits, thereby reducing power consumption while maintaining reliability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ADC performs self-monitoring through integrated result comparison circuits that automatically compare consecutive conversion results. The system uses its own internal resources to detect faults and set safety fault flags, eliminating the need for external redundant monitoring systems and reducing overall power consumption

Inventive Principle:
Principle #25Self-service

2Reliability

If redundant circuits or external monitors are used to ensure signal integrity, then reliability is improved, but cost increases

Engineering Contradiction:
Improvesignal integrityVSAvoidcost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent integrates multiple functions (ADC conversion, result comparison, fault detection, and safety flagging) into a single device, eliminating the need for separate external monitor circuits and reducing system component count, which directly reduces manufacturing cost while maintaining signal integrity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ADC is designed to perform multiple functions simultaneously: analog-to-digital conversion, result comparison, fault detection, and safety monitoring. This multi-functionality eliminates the need for dedicated separate monitoring circuits, reducing overall system cost while ensuring signal integrity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If fault detection is performed during operation, then safety compliance is improved, but digital output availability may be affected

Engineering Contradiction:
Improvesafety complianceVSAvoiddigital output availability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system continuously compares conversion results in the background and sets safety fault flags proactively before faults affect output usage. By performing error checking continuously and setting flags in advance, the system ensures safety compliance without interrupting digital output availability, as the flags are ready before any potential fault impacts the output

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20230097130A1Fault detection within an analog-to-digital converter
Publication Date: 2023.03.30 TEXAS INSTRUMENTS INC
  • US20230097130A1 patent drawing
  • US20230097130A1 patent drawing
  • US20230097130A1 patent drawing

AI summary

An integrated circuit includes an analog-to-digital converter (ADC) having selectable first and second analog channel inputs and a digital output. A window comparator coupled to the digital output. The window comparator configured to compare a digital value on the digital output to first and second threshold values. A programmable clock circuit configured to provide a clock signal to the ADC. A controller that, response to assertion of the trigger signal, is configured to generate a sample rate control signal to the clock circuit to cause the clock circuit to increase the frequency of the clock signal and toggle selection between the first and second analog channel inputs. A result comparison circuit having a comparison input coupled to the digital output. The result comparison circuit is configured to compare a first digital conversion output from the ADC toa second digital conversion output from the ADC.