ADC Input Impedance Boosting Using Parasitic Capacitance Feedback
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Solution Overview
Problem
Existing input impedance boosting circuits are sensitive to parasitic capacitance components, limiting their performance and requiring additional calibration or trimming, which increases power consumption and circuit complexity.
Innovation Solution
An input impedance boosting apparatus that includes an analog-to-digital converter with input and feedback capacitors, shielding metals, and an impedance booster that copies and adds parasitic components to the positive feedback loop, minimizing the effect of parasitic capacitance without additional calibration or trimming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a positive feedback loop is used to boost input impedance, then input impedance is improved, but the circuit becomes sensitive to parasitic capacitance components
Solution Approach 1:
The patent creates a copy of the parasitic capacitance using a dummy capacitor (C_dummy) that replicates the parasitic effect. This copied parasitic capacitance is then intentionally added to the feedback path through switch S2, transforming the harmful parasitic effect into a controlled design parameter that can be compensated for in the impedance boosting calculation.
2Reliability
If trimming method is used to minimize parasitic effect, then input impedance is improved, but device complexity and power consumption increase
Solution Approach 1:
The circuit performs self-calibration by automatically measuring its own parasitic capacitance through the dummy capacitor and switch network, then using this measured information to adjust the feedback capacitance value. This eliminates the need for external trimming components and manual calibration procedures, reducing overall device complexity while maintaining high input impedance performance.
3Reliability
If trimming method is used to minimize parasitic effect, then input impedance is improved, but power consumption increases
Solution Approach 1:
The calibration switches (S1 and S2) are operated periodically rather than continuously - S1 is closed during calibration phases to measure parasitic capacitance, then opened during normal operation. This periodic switching approach enables parasitic compensation while minimizing power consumption compared to continuously active trimming circuits.
4Reliability
If feedback capacitance is increased to compensate for parasitic capacitance, then input impedance is improved, but the effect of parasitic capacitance becomes more significant
Solution Approach 1:
The patent uses a feedback mechanism where the measured parasitic capacitance from the dummy capacitor is fed back into the design calculation for the main feedback capacitor (C_fb). The feedback path includes switch S2 that can connect the dummy capacitor in parallel with C_fb, allowing the system to dynamically adjust and compensate for parasitic effects based on actual measurements, thereby maintaining high input impedance without excessive feedback capacitance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The apparatus achieves a significant boost in input impedance while reducing power consumption and circuit area, with improved impedance-boosting performance compared to existing techniques, achieving up to 70 times higher impedance with minimal additional area and power consumption.
Implementation Method 1
an input capacitor connected to an input terminal of the analog-to-digital converter and a ground line and including a first shielding metal formed thereunder; a feedback capacitor connected onto a positive feedback loop of the analog-to-digital converter and including a second shielding metal formed thereunder
Data Source
AI summary
Disclosed is an input impedance boosting apparatus. More particularly, an input impedance boosting apparatus including an analog-to-digital converter; an input capacitor connected to an input terminal of the analog-to-digital converter and a ground line and including a first shielding metal formed thereunder; a feedback capacitor connected onto a positive feedback loop of the analog-to-digital converter and including a second shielding metal formed thereunder; and an impedance booster connected to both ends of the feedback capacitor and configured to boost an input impedance based on a first parasitic component formed between the input capacitor and the first shielding metal and a second parasitic component formed between the feedback capacitor and the second shielding metal is provided.