Switched-Capacitor ADC Gain Calibration with Single-Voltage Feedback
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Solution Overview
Problem
Delta-sigma analog to digital converters (ADCs) face challenges in accurately measuring gain due to noise, component mismatches, and parasitic capacitances, which affect the precision of temperature and other analog signal conversions.
Innovation Solution
A method for gain calibration in delta-sigma ADCs using a single conversion with a single input voltage applied to both the input and feedback ports, allowing for the calculation of the actual gain without requiring multiple precision reference voltages, and utilizing a switched-capacitor integrator with specific switching schemes during calibration and normal operation modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional gain measurement methods are used in delta-sigma ADCs, then multiple precision reference voltages are required, but this increases device complexity and measurement time
Solution Approach 1:
The patent extracts the essential function of gain measurement by applying a single input voltage to both input and feedback ports, eliminating the need for multiple precision reference voltages. This extraction approach maintains measurement precision while removing unnecessary complex components.
Solution Approach 2:
The single input voltage serves multiple functions simultaneously: it acts as both the input signal and the feedback reference, enabling gain measurement without requiring separate precision reference voltage sources. This multi-functionality reduces device complexity while maintaining measurement accuracy.
2Measurement precision
If conventional gain measurement methods are used, then multiple precision reference voltages are required, but this increases measurement time
Solution Approach 1:
The patent performs preliminary action by applying the single input voltage to both ports simultaneously at the beginning of the measurement process, enabling direct calculation of gain without sequential measurements. This approach maintains precision while significantly reducing the time required for gain measurement.
3Measurement precision
If standard calibration modes are used, then component mismatches and parasitic capacitances cause errors, but correcting these requires complex calibration procedures
Solution Approach 1:
The patent uses feedback by applying the input voltage to both the input port and feedback port, creating a closed-loop measurement system. This feedback mechanism enables direct observation and calculation of the actual gain, allowing for precise correction of errors due to component mismatches and parasitic capacitances through the calculated calibration coefficient.
4Measurement precision
If gain calibration is performed to correct errors, then conversion precision is improved, but the calibration process adds operational complexity
Solution Approach 1:
The system performs self-service calibration by automatically calculating the calibration coefficient from the measured actual gain without requiring external intervention or complex calibration procedures. The single conversion process inherently provides the information needed for correction, maintaining operational simplicity while achieving high precision.
Data Source
AI summary
In accordance with an embodiment, a method of operating an oversampled data converter having a switched-capacitor (SC) integrator includes operating the oversampled data converter in a gain calibration mode; applying a first voltage to a feedback port of the SC integrator to form a feedback voltage, and during a first clock phase the method further includes applying the first voltage to a first series capacitor via the input port when an output of the oversampled data converter is in a first state; applying a bypass voltage to the first series capacitor when the output of the oversampled data converter is an a second state and applying the first voltage to a second series capacitor via the feedback port with a polarity based on the output of the oversampled data converter, and during a second clock phase the method includes integrating charges of the first series capacitor and the second series capacitor.