ADC Jitter Spur Removal for High-Speed Signal Measurement

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-frequency sampling clocks in analog-to-digital converters for automated test equipment are limited by jitter or phase noise, which deteriorate the performance of measurement instrumentation by inducing jitter impurities into output signals.

Innovation Solution

An automated test equipment system that includes an analog-to-digital converter, a sampling clock, a time-to-frequency converter, and a jitter components removal module, which converts analog time domain signals to digital frequency domain signals and removes jitter components by calculating and subtracting spur frequencies based on empirically determined operating parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high frequency sampling clock is used to increase conversion speed, then productivity is improved, but jitter impurities are induced into output signal deteriorating measurement precision

Engineering Contradiction:
Improveconversion speedVSAvoidoutput signal quality
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent extracts and removes jitter components from the digital frequency domain signal by identifying and subtracting spur frequencies from the spectrum. The jitter removal module specifically targets and eliminates the harmful jitter impurities while preserving the useful signal components, thereby resolving the contradiction between high conversion speed and output signal quality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a time-to-frequency converter and jitter removal module as intermediary components between the analog-to-digital converter and the measurement system. These intermediaries process the digital signal to eliminate jitter components before final measurement, allowing high-frequency sampling to proceed while maintaining measurement precision through intermediate signal conditioning

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If sampling clock jitter is reduced to improve measurement precision, then output signal quality is improved, but device complexity increases due to additional jitter removal components

Engineering Contradiction:
Improveoutput signal qualityVSAvoidsystem structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces complex hardware-based jitter reduction mechanisms with a software/digital signal processing approach. By using a time-to-frequency converter to transform the signal into the frequency domain and then algorithmically removing jitter components, the system achieves high measurement precision without requiring complex mechanical or hardware jitter suppression circuits

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the representation parameters of the signal by converting from time domain to frequency domain using a time-to-frequency converter. This parameter transformation enables selective identification and removal of jitter components at specific frequency bins, achieving precise jitter removal with relatively simple processing logic

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If deterministic jitter components are removed from digital frequency domain signal, then measurement precision is improved, but loss of information may occur if jitter components are mistakenly identified as signal components

Engineering Contradiction:
Improvesignal accuracyVSAvoidsignal integrity
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The patent applies local quality by treating different frequency bins differently in the frequency domain. The jitter removal module selectively processes only those frequency bins where jitter spurs are identified, leaving other frequency bins untouched. This localized approach ensures that deterministic jitter is removed from affected bins while preserving genuine signal components in other bins, preventing information loss

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9954546B2Removal of sampling clock jitter induced in an output signal of an analog-to-digital converter
Publication Date: 2018.04.24 ADVANTEST CORP
  • US9954546B2 patent drawing
  • US9954546B2 patent drawing
  • US9954546B2 patent drawing

AI summary

An automated test equipment for analyzing an analog time domain output signal of an electronic device under test includes: an analog-to-digital converter configured for converting an analog time domain signal; a sampling clock configured for producing a clock signal; a time-to-frequency converter configured for converting the digital time domain signal into a digital frequency domain signal so that the digital frequency domain signal is represented by frequency bins; a memory device configured for storing a set of empirically determined operating parameters; and a jitter components removal module for removing jitter components produced by the analog-to-digital converter, wherein the jitter removal module is configured for subtracting the lower spur and the upper spur of each frequency bin of the frequency bins from the digital frequency domain signal so that the cleaned digital frequency domain signal is produced.