ADC Linearity Testing Using Comparator Trip-Point Characterization
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Solution Overview
Problem
Analog-to-digital converters (ADCs) face challenges in maintaining linearity due to component mismatches and environmental changes, leading to non-linearities that affect performance metrics like differential nonlinearity (DNL), integral nonlinearity (INL), and spurious free dynamic range (SFDR, especially in high-frequency systems like RF and radar systems.
Innovation Solution
A method and system for testing ADC linearity by determining the comparator trip point using a ramp signal with a first slope, then applying a second signal with a reduced slope to monitor output codes and generate statistical information, allowing for quick evaluation of linearity and periodic calibration to maintain performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If calibration techniques are used to improve ADC linearity, then linearity performance is improved, but linearity performance degrades over time due to parameter shifts from environmental changes
Solution Approach 1:
The patent performs ADC linearity testing and characterization before the ADC is fully operational or deployed. By conducting comprehensive linearity tests across multiple code transitions and environmental conditions in advance, the system establishes baseline performance data that can be used for later comparison and compensation, preventing performance degradation issues from arising during operation.
Solution Approach 2:
The patent implements a feedback mechanism where ADC output codes are monitored and used to determine whether linearity performance meets predetermined criteria. Based on this feedback, the system selectively performs additional calibration or compensation actions. This closed-loop approach ensures that linearity performance is maintained despite environmental parameter shifts by continuously monitoring and correcting deviations.
2Measurement precision
If comprehensive linearity testing is performed to accurately measure DNL, INL, and SFDR, then measurement precision is improved, but testing time and complexity increase
Solution Approach 1:
The patent divides the linearity testing process into multiple discrete code transition tests. Instead of performing a single comprehensive test, the system individually tests specific code transitions (such as mid-scale and end-scale transitions) by applying targeted test signals. This segmentation allows for efficient measurement of DNL, INL, and SFDR by focusing on critical transition points rather than testing all possible code transitions exhaustively.
Solution Approach 2:
The patent changes test signal parameters (such as signal frequency, amplitude, and transition points) to optimize measurement efficiency. By adjusting these parameters based on which linearity metrics need to be measured and which code transitions are most critical, the system achieves accurate linearity characterization without requiring exhaustive testing of all operating conditions, thus reducing overall test time while maintaining measurement precision.
Data Source
AI summary
In accordance with an embodiment, a method for operating an analog-to-digital converter (ADC) includes: determining a trip point of a comparator of the ADC by applying a first signal having a first slope to an input of the ADC, and monitoring an output state of the comparator in response to the first signal; and after applying the first signal, applying a second signal having a second signal level based on the determined trip point of the comparator, monitoring values of an output code of the ADC in response to the second signal, and generating statistical information based on the monitored values of the output code, where the second signal is a static signal or has as second slope less than the first slope.