ADC Non-Linearity Correction Using Signal-Derivative Cross Terms
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Solution Overview
Problem
Analog-to-digital converters (ADCs) in RF sampling architectures suffer from non-linearity and non-linearity mismatch, leading to unwanted harmonics and degradation of output signals, particularly in interleaved architectures where memory effects and timing mismatches introduce significant impairments across a wide band of frequencies.
Innovation Solution
The implementation of a non-linearity corrector that combines Volterra terms with the cross product of the digital signal and its derivative, along with NL coefficients, to generate a non-linearity term that is then subtracted from the digital signal, effectively reducing non-linearity and mismatch, and performing this correction prior to interleaving mismatch correction to prevent reintroduction of errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If ADCs are used to directly digitize RF signals without analog-frequency conversion, then materials, costs, design complexity, space, and power are reduced, but non-linearity and non-linearity mismatch occur leading to unwanted harmonics and signal degradation
Solution Approach 1:
The patent models the non-linear distortion products generated by the ADC and uses this model to create correction terms that are subtracted from the digital signal. By characterizing the harmful non-linearity and systematically generating compensation signals based on Volterra series and cross-terms, the invention converts the ADC's inherent non-linear behavior into a correctable phenomenon, thereby eliminating unwanted harmonics while preserving the simplified RF sampling architecture
Solution Approach 2:
The patent introduces correction parameters (Volterra coefficients and cross-term coefficients) that are determined through calibration and used to adjust the digital signal. By changing the signal parameters through mathematical operations—specifically by adding correction terms that are functions of the input signal and its derivatives—the system compensates for non-linearity without altering the physical ADC structure or operating conditions
2Productivity
If interleaved ADC architectures are used to increase sampling rate, then productivity is improved, but memory effects and timing mismatches introduce significant non-linearity impairments across a wide band of frequencies
Solution Approach 1:
The patent performs non-linearity correction before interleaving mismatch correction in the signal processing chain. By addressing the non-linearity caused by memory effects in the interleaved architecture at an earlier stage, the system prevents these errors from propagating and complicating subsequent correction stages, thereby maintaining signal accuracy across the wide frequency band enabled by high-speed interleaved sampling
Data Source
AI summary
Methods and apparatus for reducing non-linearity in analog to digital converters are disclosed. An example apparatus includes an analog-to-digital converter to convert an analog signal into a digital signal; and a non-linearity corrector coupled to the analog-to-digital converter to determine a derivative of the digital signal; determine cross terms including a combination of the digital signal and the derivative of the digital signal; and determine a non-linearity term corresponding to a combination of the cross terms.