Switched-Capacitor Integrator for ADC Offset Cancellation

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Solution Overview

Problem

Conventional analog-to-digital converters face challenges in achieving high accuracy and efficiency due to offset voltage issues from operational amplifiers, which affect conversion accuracy and are sensitive to temperature and power supply variations.

Innovation Solution

An integrator and analog-to-digital converter design that utilizes operational amplifiers with offset capacitors and controllable switches to store and counteract offset voltages, operating in various modes such as return-to-zero, integral, and cyclic modes to eliminate offset voltages and improve conversion efficiency and accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional Σ-Δ analog-to-digital converter adopts over-sampling and noise shaping technologies to achieve high conversion accuracy, then conversion accuracy is improved, but conversion speed deteriorates and conversion efficiency becomes low

Engineering Contradiction:
Improveconversion accuracyVSAvoidconversion efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The converter is divided into two independent modules: a Σ-Δ converter for high-order conversion and a SAR converter for low-order conversion. Each module operates independently to handle different aspects of the conversion task, allowing the system to achieve high accuracy without sacrificing conversion speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between different conversion modes and utilizes multiple operating phases (first phase for Σ-Δ conversion, second phase for SAR conversion) to adapt to different conversion requirements, optimizing both accuracy and efficiency based on the specific conversion task.

Inventive Principle:
Principle #15Dynamics

2Productivity

If successive approximation register analog-to-digital converter divides reference voltage signal to achieve high conversion efficiency, then conversion efficiency is improved, but conversion accuracy deteriorates due to large resistance voltage divider network and exponential increase in gate switches

Engineering Contradiction:
Improveconversion efficiencyVSAvoidconversion accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The conversion process is segmented into high-order conversion (handled by Σ-Δ converter) and low-order conversion (handled by SAR converter). This segmentation allows the SAR converter to operate with fewer bits and fewer switches, reducing the complexity of the voltage divider network while maintaining overall high conversion accuracy through the combination with the Σ-Δ converter.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If analog-to-digital converter combines SAR and Σ-Δ converters to achieve high accuracy easily, then conversion accuracy is improved, but offset voltage of operational amplifier cannot be eliminated and directly reflects in differential output voltage of integrator

Engineering Contradiction:
Improveconversion accuracyVSAvoidoffset voltage stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The system employs periodic calibration cycles where the operational amplifier offset voltage is measured and compensated during dedicated calibration phases. The converter alternates between normal conversion operation and offset calibration, ensuring that offset errors are continuously corrected without affecting the overall conversion accuracy.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

A feedback mechanism is implemented where the offset voltage of the operational amplifier is detected through the differential output of the integrator and fed back to a calibration circuit. The calibration circuit adjusts the offset compensation based on the detected error, creating a closed-loop system that maintains stable and reliable operation despite temperature and power supply variations.

Inventive Principle:
Principle #23Feedback

4Measurement precision

If system calibrates offset error of ADC at room temperature and typical operation voltage, then offset error is corrected under specific conditions, but temperature feature and power supply suppression feature deteriorate due to offset voltage variation with voltage and temperature

Engineering Contradiction:
Improveoffset error correctionVSAvoidtemperature and power supply suppression feature
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The system performs preliminary offset calibration at multiple temperature points and power supply voltages during the manufacturing or initialization phase. Calibration data collected under various conditions is stored and used to generate compensation tables that are applied during normal operation, allowing the system to pre-compensate for offset variations due to temperature and power supply changes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A real-time feedback mechanism continuously monitors temperature and power supply voltage and dynamically adjusts the offset compensation based on current operating conditions. The system reads from pre-characterized compensation tables or uses active feedback circuits to counteract offset voltage variations, maintaining accurate conversion across different temperatures and power supply levels.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11611347B2Integrator and analog-to-digital converter
Publication Date: 2023.03.21 SILERGY SEMICON TECH (HANGZHOU) CO LTD
  • US11611347B2 patent drawing
  • US11611347B2 patent drawing
  • US11611347B2 patent drawing

AI summary

An integrator and an analog-to-digital converter are provided. The analog-to-digital converter includes the integrator, a comparison circuit and a control logic circuit. The integrator includes an operational amplifier, offset capacitors, input capacitors, integral capacitors and controllable switches. The input capacitors and the integral capacitors are connected to the operational amplifier via controllable switches, so that the integrator operates in various operation modes. Operation states of the offset capacitors in a first phase and a second phase of an operation cycle are controlled by switching on or off the controllable switches. Therefore, an offset voltage of the integrator is eliminated, and conversion efficiency and conversion accuracy of the analog-to-digital converter is improved.