ADC Comparator Offset Distribution for Lower Power Surge Noise
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Solution Overview
Problem
Concentrated timing of comparator inversions in single-slope ADCs leads to power line fluctuations, counting jitters, power supply noise, and linearity errors in imaging devices due to simultaneous power-consuming events across multiple ADC columns.
Innovation Solution
Incorporating offset distribution circuitry that selectively injects voltage offsets into the comparators of each ADC column, distributing the power spike across multiple ADCs to reduce simultaneous inversion events and minimize noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple ADC columns operate simultaneously with dedicated comparators, then conversion speed and productivity are improved, but power line fluctuations and noise increase due to concentrated comparator inversions
Solution Approach 1:
The patent segments the ADC columns into multiple groups, where each group shares a common comparator. By distributing comparator inversions across different time periods for different groups, the concentrated power-consuming events are divided and staggered, reducing power line fluctuations while maintaining overall conversion speed through parallel processing of multiple groups.
2Measurement precision
If dedicated ADCs are provided for each pixel column, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent merges multiple ADC columns into groups that share common comparators and other circuit resources. This reduces the total number of independent ADC circuits needed, thereby lowering device complexity and power consumption while maintaining measurement precision through the preserved one-to-one mapping between pixel columns and ADC conversion channels.
3Use of energy by moving object
If comparator inversions are concentrated at the same time, then power efficiency is improved, but linearity error and counting jitter increase
Solution Approach 1:
The patent implements periodic action by staggering comparator inversions across different time periods for different column groups. Instead of all comparators inverting simultaneously, groups are scheduled to invert at different times, which distributes power consumption more evenly (improving power efficiency) while preventing the concentrated timing that causes linearity errors and counting jitter.
Data Source
AI summary
Analog-to-digital converter (ADC) circuitry may receive multiple analog signals and output corresponding digital signals. During the conversion process, comparators may receive the analog signals and a ramp waveform and compare the two inputs to generate logic signals. The logic signals correspond to digital signals that are outputted by ADC circuitry. To enable offset distribution capabilities, offset distribution circuitry may be selectively coupled to the inputs of the comparators. The offset distribution circuitry may include switches that couples a voltage supply providing reference voltages to the comparators. The reference voltages may be conveyed via a capacitor to the comparators as offset voltages. The offset voltages may provide may be different for different ADC units to offset power consumption of different ADC units and reduce power surges in power sources coupled to ADC circuitry.