Time-Interleaved ADC Offset Calibration Without Sampling Loss

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Solution Overview

Problem

Analog-to-digital converters (ADCs) face challenges in uniform calibration due to process variations and random component variations, leading to offset errors that can be erroneously canceled by automatic offset calibration functions, especially when input signals have specific frequencies.

Innovation Solution

The proposed solution involves an analog-to-digital converting device with N-stage first ADCs and a second ADC, operating at different sampling frequencies, where the first ADCs convert input signals in a time-interleaved manner and a calibration circuit calibrates offsets to generate corrected quantized outputs, with a data recovery circuit subtracting erroneous calibrations to produce accurate output data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If automatic offset calibration function is used in ADC, then offset errors can be corrected, but sampling results may be erroneously canceled when input signals have certain frequencies

Engineering Contradiction:
Improveoffset calibration accuracyVSAvoidsampling result loss
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The patent divides the calibration process into two independent parts: offset calibration and gain calibration. The offset calibration is performed separately from gain calibration, allowing each to be optimized independently. This segmentation prevents the interference between offset and gain calibration that causes sampling result loss in conventional unified calibration approaches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs offset calibration before gain calibration in a sequential manner. By completing the offset calibration first and then proceeding to gain calibration, the system ensures that offset errors are corrected without being affected by subsequent gain calibration operations, preventing the erroneous cancellation of sampling results.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If factory calibration is performed uniformly for ADCs, then manufacturing consistency can be improved, but it is difficult to account for process variations and random component variations

Engineering Contradiction:
Improvecalibration uniformityVSAvoidcalibration accuracy under process variation
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent implements separate calibration parameters for offset and gain, allowing independent adjustment of each parameter. This enables the system to account for different types of variations (process variations, random component variations) by adjusting the appropriate parameter without affecting the other, thereby maintaining calibration accuracy under various operating conditions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic calibration capabilities where offset and gain can be calibrated independently based on actual operating conditions. This dynamic approach allows the system to adapt to process variations and random component variations by adjusting calibration parameters as needed, rather than relying on fixed factory calibration settings.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11973511B2Analog-to-digital converting device and method of offset calibration
Publication Date: 2024.04.30 GLOBAL UNICHIP CORPORATION
  • US11973511B2 patent drawing
  • US11973511B2 patent drawing
  • US11973511B2 patent drawing

AI summary

An analog-to-digital converting device includes N-stage first analog-to-digital converters (ADCs), a second ADC, a first calibration circuit, a data recovery circuit and an output circuit. The N-stage first ADCs has a first sampling frequency that is (N+1)/N times of a second sampling frequency, and converts an input signal into first quantized outputs. The second ADC has the second sampling frequency, and converts the input signal into a second quantized output. The first calibration circuit calibrates offsets of the first quantized outputs and the second quantized output to generate third quantized outputs and a fourth quantized output. The data recovery circuit outputs, by the second sampling frequency, one of the third quantized outputs as a fifth quantized output, and subtracts the fifth quantized output from the fourth quantized output to generate output data. The output circuit generates an output signal according to the third quantized outputs and the output data.