Configurable ADC Pipeline Reuse for Reference Signal Noise Cancellation
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Solution Overview
Problem
Multi-pipeline data processors face inefficiencies when not all data pipes are actively used, leading to idle functionality that could improve system performance and functionality, particularly in receiving multiple analogue input signals and providing digital output signals.
Innovation Solution
The processor incorporates a configurable pipeline multiplexer that allows idle analogue-to-digital converters to process reference signals, which are then used to improve noise cancellation and system performance by configuring active data pipes and amplifiers, enabling the use of idle pipes for internal node measurement and noise reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple data pipes are provided in the processor, then the system can receive multiple analogue input signals simultaneously, but idle data pipes waste chip area and functionality when not all pipes are actively used
Solution Approach 1:
The patent makes idle data pipes multi-functional by enabling them to perform reference signal processing in addition to their primary data processing function. The configurable pipeline multiplexer allows idle ADCs to accept reference signals from reference nodes, transforming them into reference signal processing units that can measure internal nodes and generate reference outputs for noise cancellation, thereby eliminating wasted chip area while maintaining adaptability for multiple input signals
2Device complexity
If idle data pipes are left unused, then the design is simpler, but system performance and noise cancellation capability are reduced
Solution Approach 1:
The patent implements self-service by having idle data pipes automatically configure themselves to process reference signals when needed. The configurable pipeline multiplexer enables idle ADCs to autonomously switch to reference signal processing mode by connecting to reference nodes, measuring internal nodes, and providing reference outputs for noise cancellation without requiring external control or additional complex circuitry
Solution Approach 2:
The patent merges the functions of data processing and reference signal processing into the same physical data pipe infrastructure. By using the configurable pipeline multiplexer to route reference signals through idle ADCs, the system combines the capabilities of multiple pipes for both data conversion and reference signal generation, improving noise cancellation and signal fidelity without adding separate reference processing hardware
3Reliability
If configurable pipeline multiplexer is used to route reference signals to idle ADCs, then noise cancellation improves, but device complexity increases
Solution Approach 1:
The configurable pipeline multiplexer is designed as a universal switching element that can route both data signals and reference signals to appropriate ADCs. This single multi-functional component replaces what would otherwise require separate dedicated reference signal routing circuitry, achieving improved noise cancellation capability while minimizing the increase in device complexity through component consolidation
Data Source
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AI summary
A processor comprising: a first-receiver-node for receiving a first-receiver-signal; a second-receiver-node for receiving a second-receiver-signal; a first-output-node for coupling to a digital-baseband-processor; a second-output-node for coupling to the digital-baseband-processor; a first-active-data-pipe extending between the first-receiver-node and the first-output-node. The first-active-data-pipe comprises: a first-analogue-to-digital-converter comprising a first-ADC-input coupled to the first-receiver-node; and a first-ADC-output coupled to the first-output-node; wherein the first-analogue-to-digital-converter is configured to provide a first-digital-signal to the first-output-node. The processor comprises a first-reference-node; and a configurable-data-pipe extending between the second-receiver-node and the second-output-node. The configurable-data-pipe comprises: a configurable-pipeline-multiplexer comprising: a first-MUX-input-node coupled to the second-receiver-node; a second-MUX-input-node coupled to the first-reference-node; and a MUX-output-node. The configurable-data-pipe also comprises a second-analogue-to-digital-converter comprising: a second-ADC-input coupled to the MUX-output-node; and a second-ADC-output coupled to the second-output-node. When the configurable-pipeline-multiplexer is configured to couple the second-MUX-input-node to the MUX-output-node, the second-analogue-to-digital-converter is configured to provide a first-digital-reference-signal to the second-output-node.