ADC Precharging Circuit for High-Bandwidth Low-Power Sampling

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Solution Overview

Problem

Existing analog front ends of ADCs face challenges in balancing power consumption, speed, and accuracy, with traditional approaches requiring high power consumption or large capacitors for signal accuracy.

Innovation Solution

The implementation of precharging circuitry that tracks the analog input signal and stores charge on a precharging capacitor, transferring it to sampling capacitors during a precharging transfer phase, allowing for reduced power consumption and higher bandwidth without large external capacitors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the input analog driver directly drives the switched capacitors of the sampling network, then the bandwidth and slew rate are improved, but the power consumption increases

Engineering Contradiction:
ImprovebandwidthVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

A precharging capacitor is introduced as an intermediary between the input analog driver and the sampling capacitors. This precharging capacitor stores charge during a precharging phase and transfers it to the sampling capacitors during a transfer phase, enabling the driver to operate at lower power while still achieving high-speed sampling through the stored charge

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The precharging capacitor is charged in advance during a precharging phase before the actual sampling occurs. This preliminary charging action allows the sampling capacitors to be quickly charged during the transfer phase without requiring continuous high-power operation from the input analog driver

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If the input analog driver drives a large output capacitor, then the power consumption is reduced, but the bandwidth decreases

Engineering Contradiction:
Improvepower consumptionVSAvoidbandwidth
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The system uses periodic precharging phases followed by rapid charge transfer phases. During the precharging phase, the driver charges the precharging capacitor at lower power; during the transfer phase, the stored charge is rapidly transferred to sampling capacitors, achieving high-speed sampling without requiring continuous high-power operation or large output capacitors

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If the input analog driver drives a large output capacitor for signal accuracy, then the signal accuracy is improved, but the device complexity and area increase

Engineering Contradiction:
Improvesignal accuracyVSAvoidcapacitor size
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The charging function is segmented into two distinct phases: a precharging phase where the precharging capacitor is charged to the signal level, and a transfer phase where the charge is transferred to the sampling capacitors. This segmentation allows accurate signal capture without requiring a single large output capacitor, reducing device area and complexity

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables high-speed sampling with accurate charge transfer, reducing power consumption and eliminating the need for external capacitors, thus achieving lower power consumption and higher signal bandwidth.

Implementation Method 1

track the analog input signal and store a charge on a precharging capacitor of the precharging circuitry, the charge based on the analog input signal, and during a precharging transfer phase of the analog-to-digital converter, transfer at least a portion of the charge stored on the precharging capacitor to the sampling capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12470230B2Systems and methods for precharging driver circuitry for an analog-to-digital converter
Publication Date: 2025.11.11 CIRRUS LOGIC INC
  • US12470230B2 patent drawing
  • US12470230B2 patent drawing
  • US12470230B2 patent drawing

AI summary

An ADC may include an analog front end (AFE) configured to receive an analog input signal and sample the input signal to generate an analog sampled signal comprising a plurality of analog samples and conversion circuitry configured to convert each analog sample to a respective digital sample during a conversion phase. The AFE may include an amplifier configured to receive and buffer the input signal to generate an analog output signal and sampling circuitry configured to sample each of the plurality of analog output samples onto a sampling capacitor during a sampling phase. The AFE may also include precharging circuitry configured to, during the conversion phase, track the analog input signal and store a charge on a precharging capacitor, the charge based on the analog input signal, and during a precharging transfer phase, transfer at least a portion of the charge stored on the precharging capacitor to the sampling capacitor.