ADC Pre-Stage Circuit Current Control During Hold Periods

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Solution Overview

Problem

An electronic circuit configured at the preceding stage of an analog-to-digital converter continues normal driving during the hold period, leading to increased power consumption.

Innovation Solution

An electronic circuit with a pre-stage circuit and a control circuit that reduces the supply current to the pre-stage circuit during specific periods, synchronizing with the alternately repeated first and second periods, where the analog-to-digital converter performs different driving.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the pre-stage circuit continues normal driving during the hold period of the analog-to-digital converter, then the conversion accuracy is maintained, but the power consumption increases

Engineering Contradiction:
Improveconversion accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by controlling the pre-stage circuit to operate in alternating active periods and low-power periods that correspond to the sampling and hold periods of the ADC. The control circuit periodically switches the pre-stage circuit between normal driving mode during sampling periods and reduced driving mode during hold periods, achieving both power savings and maintained conversion accuracy through this periodic operational pattern.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If the supply current to the pre-stage circuit is reduced during the hold period, then the power consumption is suppressed, but the circuit response time may increase

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit response time
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent implements dynamics by making the operational state of the pre-stage circuit changeable based on the timing signal from the control circuit. The pre-stage circuit dynamically transitions between full-performance mode and reduced-performance mode according to whether the ADC is in sampling or hold period, allowing optimal balance between power consumption and response time for each operational phase.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250202518A1Electronic circuit, ad conversion device, communication device, and control method
Publication Date: 2025.06.19 SONY SEMICON SOLUTIONS CORP
  • US20250202518A1 patent drawing
  • US20250202518A1 patent drawing
  • US20250202518A1 patent drawing

AI summary

Provided is an electronic circuit, an AD conversion device, and a communication device capable of suppressing power consumption of a circuit configured in a preceding stage of an analog-to-digital converter. An electronic circuit includes a pre-stage circuit configured to supply an analog signal to an analog-to-digital converter that performs different driving in a first period and a second period, and a control circuit configured to reduce a supply current to the pre-stage circuit according to the first period.