ADC Reference Circuit for Parasitic-Resistant Voltage Measurement

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Solution Overview

Problem

Existing integrated circuits for measuring analog voltage signals face accuracy constraints due to error components associated with internal device and routing parasitic resistances, limiting their ability to provide high accuracy measurements.

Innovation Solution

A voltage measurement system that combines a voltage reference circuit and an analog-to-digital converter (ADC) with controlled switches to cancel out error components by leveraging the intrinsic operations of both circuits, using techniques such as chopping and dynamic element matching to minimize parasitic resistance effects, thereby achieving higher accuracy without the need for additional components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional voltage reference source is used in the ADC system, then the system structure remains simple, but the measurement precision is limited due to parasitic resistance errors

Engineering Contradiction:
Improvevoltage measurement accuracyVSAvoidcircuit structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The voltage reference source is segmented into multiple sub-reference voltage sources (first voltage reference source, second voltage reference source, etc.), each generating reference voltages at different nodes. This segmentation allows the system to capture and compensate for parasitic resistance errors by measuring voltage drops across different segments, thereby improving measurement precision without requiring a complete redesign of the reference source architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements feedback by using the ADC to measure reference voltages at multiple nodes and calculating the parasitic resistance errors. These measured errors are then fed back to correct the final voltage measurement result. The control circuit continuously monitors and adjusts for parasitic effects, creating a closed-loop system that maintains high measurement accuracy despite the presence of parasitic resistances.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If additional components are added to compensate for parasitic resistance errors, then the measurement precision improves, but the device complexity increases

Engineering Contradiction:
Improvevoltage measurement accuracyVSAvoidnumber of components
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The existing ADC and voltage reference source are made multi-functional. The ADC not only converts the input voltage to digital form but also measures reference voltages at multiple internal nodes to characterize parasitic errors. The voltage reference source simultaneously provides the reference voltage for conversion and serves as the measurement target for error characterization. This multi-functionality eliminates the need for separate compensation components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system performs self-characterization and self-compensation. The ADC uses its own internal reference nodes to measure and quantify the parasitic resistance errors within its own architecture. The control circuit then uses these self-measured error values to correct the final measurement result. This self-service approach eliminates the need for external calibration equipment or additional compensation components.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If the ADC samples multiple reference voltages to cancel error components, then the measurement precision improves, but the conversion time increases

Engineering Contradiction:
Improveerror cancellation accuracyVSAvoidconversion time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs preliminary characterization of the reference voltage sources and parasitic resistance values during an initial calibration phase. These characterized parameters are stored and used during normal operation to directly calculate compensation values without requiring multiple reference voltage samples during conversion. This preliminary action separates the error characterization from the actual voltage measurement, reducing conversion time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements periodic calibration cycles where the ADC characterizes the reference voltages and parasitic resistances, alternating between calibration mode and normal measurement mode. During normal operation, pre-characterized values are used for rapid compensation calculations. The periodic recalibration ensures accuracy is maintained over time while minimizing the impact on overall conversion throughput by confining multi-sample operations to dedicated calibration intervals.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11733277B2Circuits and methods for voltage measurement
Publication Date: 2023.08.22 NXP BV
  • US11733277B2 patent drawing
  • US11733277B2 patent drawing
  • US11733277B2 patent drawing

AI summary

An integrated circuit includes an analog-to-digital converter (ADC) configured to receive input voltage, and first and second reference voltages, and outputs digital code representing ratios between the input voltage and the first and the second reference voltages. The first and second reference voltages are generated by a reference generator using different current densities. During a first stage, the ADC samples the first input voltage and the first reference voltage and transfers equivalent charge of the sampled first input voltage and first reference voltage to an integration capacitor. During a second stage, the ADC samples the second reference voltage and transfers equivalent charge of the sampled second reference voltage to the integration capacitor. The ADC provides one bit of digital code based on total charge stored on the integration capacitor after the transfers of charge of the sampled input voltage, and the sampled first and second reference voltages.