Current/Voltage Measurement TRIZ Cases

By synthesizing a virtual reference voltage, this ADC circuit cancels parasitic resistance errors and improves voltage measurement accuracy.

A zener diode and transistor wraparound circuit isolates inactive coupled coils from counter-EMF, preventing false fault signals.

Constant-current clamping keeps supply voltage detection accurate with low drift and lower power, without external reset signals.

A tap-sampled delay line tracks clock edge shifts to detect processor voltage droop early and trigger clock slowing before timing failures.

Samples class-D amplifier half cycles to detect loudspeaker current accurately during clipping without reducing output power.

A coil and Hall sensor path are combined with pole-zero and temperature-drift compensation to deliver wide-band, accurate current sensing.

A sensor and gate-source feedback loop keeps analog switch resistance constant as voltage changes, cutting harmonic distortion under light loads.

A trim-resistor and AND-gate scheme detects stable supply voltage without a bandgap reference, cutting power and size while keeping reset accuracy.

Load-voltage feedback detects spike conditions and adjusts switching timing to protect dimmers and inductive loads with less hardware protection.

Preliminary counting and remainder estimation raise sensing resolution while shortening integration time for slowly changing signals.

Automatic switching between opposite-sign gain paths prevents saturation and preserves precision for low-intensity current measurement.

Linear mains charging keeps the output capacitor just below LED turn-on, cutting standby-to-light delay while lowering standby power.

A voltage divider lets all output switches turn off together, cutting diagnosis time while detecting short circuits for faster shutdowns.

A bandlimited capacitance driver uses synthetic admittance to cut sampling-capacitor thermal noise below conventional follower limits.

Two oscillators with different temperature dependencies improve semiconductor voltage detection accuracy, range, and power use.

Dynamic timing control uses temperature sensing and voltage detection to keep semiconductor memory operation reliable across changing conditions.

Operational amplifiers and diodes enable precise bidirectional current sensing across different ground references with stable high-frequency measurement.

A tap-sampled delay line tracks clock edge shifts to detect processor voltage droop quickly and trigger lower-frequency clocking to avoid timing failures.

A multiplexed single transducer and ADC measures multiple IC load currents, cutting substrate area and power in low-voltage designs.

A latch-capacitor circuit detects nanosecond power glitches with low area and no static bias current, strengthening security chip fault attack defense.

Threshold voltage tracking adjusts GaN power semiconductor gate drive to hold conduction losses steady and slow aging over service life.

A trim-resistor and AND-gate scheme detects stable supply voltage without a BGR circuit, cutting power and size while preserving accuracy.

A capacitive DAC, comparator, and binary code generator replace resistor dividers to monitor battery voltage with far lower power and smaller area.

Split detection resistors and differential amplifier feedback improve current sensing accuracy while lowering resistor cost and power use.

Internal calibration using a comparator, integrating unit, and crossbar switch removes external test equipment and maintains AD converter accuracy over time.

Adaptive pullup and pulldown testing detects broken-wire faults on a single analog input path while reducing leakage, area, and power.

Multiple voltage thresholds and duty-cycle averaging help ICs distinguish malicious voltage glitches from normal clock fluctuations.

Multiple MOS thresholds and voltage sampling detect specific power and ground glitches with high sensitivity while limiting chip area.

By tracking supply voltage and two equal-width output pulses, this case computes chip power-on reset time more precisely and speeds verification.

Two voltage-sensitive circuit paths cancel clock-jitter delay effects, enabling IC alerts for voltage-based attacks with fewer false positives.

A programmable differential threshold matched to signal common mode improves loss detection accuracy and reduces false triggers in noisy links.

An AC-coupled feedback amplifier raises output with sink current changes, enabling low-voltage detection and protecting back-end circuits.

An embedded split-source sense transistor measures LF driver current accurately without external resistors or large current-copy circuitry.

Multiple MOS thresholds improve detection of specific power and ground glitches while limiting chip area and device overhead.

Chopping-only current sensing with a switched-capacitor filter cuts offset, improves CMRR, and enables a smaller high-side package.

Dual current-sensing paths sample PWM peak currents to detect transistor and sensing faults while avoiding added impedance in inductive loads.

A switched inner-voltage path keeps voltage monitoring stable at low input levels while protecting MOSFET gate-source limits at higher voltages.

A master-slave strong arm latch uses sampling and DAC common-mode shifting to extend input range at low Vcc while reducing offset and kickback noise.

A mirroring circuit separates AC sampling from DC cancellation to speed current setup while reducing noise and preserving dynamic range.

An adjustable lower detection limit improves battery voltage resolution from 5-25 V while keeping the sensing circuit simple and low power.

A sampling transistor and capacitor capture the brief Miller plateau to measure FET conduction and detect faults or short circuits.

By comparing transistor base and emitter measurements, this RF detector stabilizes PA output across process corners and temperature.

Dual positive and negative temperature references let an ADC calculate absolute voltage digitally while reducing stress sensitivity and drift.

DAC-driven calibration data corrects comparator errors in analog test buses, enabling precise multi-node testing with less shorting risk and noise.

Half-cycle timing from a zero-crossing detector lets a microcontroller identify AC input voltage ranges without extra sensing circuitry or pins.

Dynamic gain switching prevents saturation in low-current detector measurement while preserving accuracy and temperature stability.

Optical LDR isolation enables remote bridge null detection in noisy test setups, improving accuracy and stability at hard-to-access points.

Voltage dividers and capacitors create a pseudo-differential ADC input for negative and bipolar measurements without active components.

On-chip threshold sensing captures fast CPU supply voltage excursions without external probes, helping prevent logic errors and excess power margin.

On-chip voltage measurement and learned classification automate slew rate adjustment, removing oscilloscope-based manual tuning.