Power Glitch Detection Circuit Using Multi-Threshold MOS Array
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Solution Overview
Problem
Existing power glitch signal detection circuits are limited in their ability to detect power glitches with specific amplitudes and lack sensitivity, making them less applicable and robust against fault attacks.
Innovation Solution
A power glitch signal detection circuit utilizing a voltage sampling module and a detection unit array of MOS transistors with different threshold voltages, along with a switch array, to detect power glitches on both power supply and ground voltages, enhancing sensitivity and applicability while reducing device overhead and chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple MOS transistors with different threshold voltages are used in the detection unit array, then the detection sensitivity and applicability for specific amplitude power glitches is improved, but the device complexity and chip area increase
Solution Approach 1:
The detection circuit is divided into multiple detection units, each containing a MOS transistor with a specific threshold voltage. Each unit is responsible for detecting power glitches within a specific amplitude range, allowing the system to achieve high detection sensitivity across different glitch amplitudes while maintaining modular structure that manages complexity.
Solution Approach 2:
The detection unit array is designed to detect both power supply voltage glitches and ground voltage glitches using the same basic circuit structure. By configuring MOS transistors with different threshold voltages, the universal detection unit can adapt to detect power glitches of various amplitudes, reducing the need for completely separate detection circuits for different scenarios.
2Measurement precision
If multiple MOS transistors with different threshold voltages are used in the detection unit array, then the detection sensitivity for specific amplitude power glitches is improved, but the chip area increases
Solution Approach 1:
Multiple detection units are merged into a single integrated detection unit array structure. The voltage sampling module is shared across all detection units, and the switches are organized in a compact array configuration. This merging approach allows multiple threshold voltage detections to be implemented in a unified circuit footprint, reducing the overall chip area compared to having separate detection circuits for each threshold level.
3Device complexity
If simple detection of power glitch signal is implemented, then the device complexity is reduced, but the applicability for detecting power glitches with specific amplitude is poor
Solution Approach 1:
Each detection unit in the array is designed with a specific local quality characteristic - a MOS transistor with a particular threshold voltage. This allows each unit to be optimized for detecting power glitches of specific amplitude ranges. The collection of units with different local qualities (threshold voltages) provides comprehensive coverage for detecting power glitches of various amplitudes, enhancing overall applicability while maintaining relatively simple individual unit designs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves the detection of power glitches with specific amplitudes, increasing the robustness and sensitivity of the circuit, reducing costs, and ensuring compatibility with CMOS processes, thereby enhancing the portability and effectiveness of the glitch signal detection.
Implementation Method 1
detection unit array, including multiple metal oxide semiconductor MOS transistors with different threshold voltages
Data Source
AI summary
A power glitch signal detection circuit, a security chip and an electronic apparatus are disclosed. The power glitch signal detection circuit includes: a voltage sampling module configured to acquire and output a sampled voltage of a power supply voltage; a detection unit array, including multiple MOS transistors with various threshold voltages, wherein first terminals of the multiple MOS transistors are connected to the sampled voltages, and second terminals of the multiple MOS transistors are connected to the power supply voltage; a switch array, including multiple switches corresponding to the multiple MOS transistors; and a signal generation circuit, wherein drain terminals of the multiple MOS transistors are connected to the signal generation circuit through the multiple switches respectively.