Capacitive DAC Voltage Monitor for Low-Power Battery Sensing
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Solution Overview
Problem
The challenge is to develop a compact and low-power voltage monitoring circuit for portable devices that can efficiently monitor battery voltage without consuming excessive power or space, as existing resistor divider-based solutions are power-intensive and occupy large areas.
Innovation Solution
A capacitive digital-to-analog converter-based monitoring circuit that uses a comparator and binary code generator to approximate the monitored voltage, consuming ultra-low power by selectively coupling capacitors to a ground reference and only utilizing the reference voltage during sampling phases, allowing for continuous battery voltage monitoring with minimal power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If resistor dividers are used to monitor battery voltage, then the monitoring function is achieved, but the circuit occupies large area and consumes excessive power
Solution Approach 1:
The patent replaces the traditional resistor divider-based voltage monitoring system with a capacitive digital-to-analog converter (CDAC) system. This substitution eliminates the need for high-value resistors that consume power continuously, using instead a capacitive array that only consumes power during switching operations, thereby dramatically reducing power consumption while maintaining monitoring reliability
Solution Approach 2:
The patent changes the fundamental operating parameters from resistive voltage division to capacitive voltage sampling. By using capacitors with switching mechanisms controlled by binary code, the system transforms from a continuous power-consuming resistive system to a discrete, event-driven capacitive system that only consumes power during measurement cycles
2Reliability
If resistor dividers are used to monitor battery voltage, then the monitoring function is achieved, but the circuit occupies large area
Solution Approach 1:
The patent replaces the physical resistor divider network with a capacitive array and digital control system. This substitution allows for significant area reduction because capacitors can be implemented with much smaller footprints than the high-value resistors required for low-power voltage division, while the digital control logic occupies minimal space compared to the analog resistor network
3Measurement precision
If continuous monitoring is implemented, then accurate battery voltage tracking is achieved, but power consumption increases
Solution Approach 1:
The patent implements periodic voltage sampling instead of continuous monitoring. The capacitive array is switched and measured at discrete intervals, with the binary code generator updating the capacitor configuration periodically. This periodic operation maintains voltage tracking accuracy while consuming power only during sampling events, not continuously
Solution Approach 2:
The patent maintains continuous monitoring capability through rapid sequential sampling and digital averaging. By continuously updating the binary code representation of the voltage and using digital signal processing to maintain accuracy, the system achieves continuous effective monitoring while the physical hardware operates in discrete, low-power sampling cycles
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves significantly lower power consumption compared to resistor divider-based systems, using approximately 10× less power while occupying a smaller area, enabling efficient battery voltage monitoring in portable devices.
Implementation Method 1
A capacitive digital-to-analog converter-based monitoring circuit that uses a comparator and binary code generator to approximate the monitored voltage, consuming ultra-low power by selectively coupling capacitors to a ground reference
Data Source
AI summary
One example relates to a monitoring circuit that includes a capacitive digital-to-analog converter that receives a binary code, a reference voltage, a monitored voltage, and a ground reference, the capacitive digital-to-analog converter outputting an analog signal based on the binary code, the reference voltage, the monitored voltage, and the ground reference. The monitoring circuit further includes a comparator including a first input coupled to receive the analog signal and a second input coupled to the reference voltage, the comparator comparing the analog signal to the reference voltage and outputting a comparator signal based on the comparison. The monitoring circuit yet further includes a binary code generator that generates the binary code based on the comparator signal, the binary code approximating a magnitude of the monitored voltage.


