RTO DAC Resistor Bypass for Faster ADC Reset Linearity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional analog to digital converters (ADCs) using return to open (RTO) DACs face issues with residual data dependency due to slow discharge or charge of parasitic capacitance during the reset phase, leading to inter symbol interference and non-linearity, especially in sigma delta modulation systems.
Innovation Solution
Incorporating a resistive bypass circuit during the reset phase to quickly adjust the charge on parasitic capacitance, reducing data dependency and shortening the reset phase, thereby minimizing inter symbol interference and improving linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a return to open (RTO) DAC is used in the feedback circuit, then the circuit complexity is reduced compared to return to zero (RTZ) DACs, but residual data dependency occurs due to slow charge/discharge of parasitic capacitance during reset phase
Solution Approach 1:
A bypass circuit is introduced as an intermediary component during the reset phase to rapidly discharge parasitic capacitance. This mediator circuit activates only when needed (during reset) to eliminate data dependency, while remaining inactive during normal operation to maintain the simplicity of the RTO DAC structure.
Solution Approach 2:
The feedback circuit dynamically switches between two modes: during normal operation, it uses the high-impedance RTO DAC for simplicity; during reset phase, it activates the bypass circuit to rapidly charge/discharge capacitance. This dynamic adaptation allows the system to optimize between complexity and reliability based on operational phase.
2Reliability
If the reset phase duration is extended to fully charge/discharge parasitic capacitance in conventional RTO DACs, then data dependency is reduced, but the productivity of the ADC is reduced due to longer reset time
Solution Approach 1:
The bypass circuit dramatically changes the resistance parameter during reset phase by providing a low-impedance discharge path. This parameter change enables rapid capacitance discharge (completing in a fraction of the reset phase), allowing the reset phase to be kept short while still achieving complete charge/discharge of parasitic capacitance.
3Reliability
If the resistive circuit resistance is reduced to speed up charge/discharge of parasitic capacitance, then data dependency is reduced, but the signal-to-noise ratio deteriorates due to increased thermal noise
Solution Approach 1:
The bypass circuit operates periodically only during the reset phase rather than continuously. This periodic activation allows the system to benefit from low resistance (fast discharge) only when needed, while during normal operation the high-impedance path is maintained to minimize thermal noise in the signal path.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The resistive bypass circuit effectively reduces residual data dependency and shortens the reset phase, enhancing the ADC's gain linearity and reducing total harmonic distortion, making the ADC more efficient and less complex compared to return to zero (RTZ) DACs.
Implementation Method 1
charge stored on the parasitic capacitance of the feedback circuit
Implementation Method 2
provides a resistance between the output of the DAC and the second input of the combiner
Data Source
Figure 1
Figure 2
Figure 3
AI summary
An analog to digital circuit that includes a feedback circuit with a return to open (RTO), digital to analog converter (DAC) that provides an analog signal that is indicative of an output of an ADC component of the ADC. During a data phase, the output of the DAC is provided to a combiner input through a resistive circuit. The combiner also receives an analog input signal at another input and provides a combined output signal to the ADC component. During a reset phase, the output of the DAC is provided to the combiner through a lower resistance bypass circuit to bypass the resistive circuit.