ADC Sequencer Scheduling for Mixed Scheduled and Ad-Hoc Conversions
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Solution Overview
Problem
Existing analog-to-digital converters (ADCs) face challenges in efficiently managing both scheduled conversions on external channels and ad-hoc conversions on internal channels, leading to reduced throughput and potential interference between conversion types.
Innovation Solution
A sequencer circuit within the ADC schedules conversions by determining availability and prioritizing scheduled operations while slotting ad-hoc conversions during idle gaps, using modes like auto-next and trigger-next policies to optimize throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the ADC performs multiple conversions simultaneously on different channels, then the throughput and capacity are increased, but the timing integrity and conversion precision deteriorate due to resource conflicts
Solution Approach 1:
The patent segments conversion operations into different priority levels: scheduled conversions (external channels) and ad-hoc conversions (internal channels). The sequencer divides the conversion timeline into scheduled slots and idle gaps, allowing simultaneous handling of multiple conversion types without interfering with each other's precision requirements
Solution Approach 2:
The sequencer acts as an intermediary between conversion requests and the ADC resource. It manages the scheduling by receiving conversion requests, determining ADC availability, and inserting conversions at appropriate times. The sequencer mediates between scheduled and ad-hoc conversions, ensuring scheduled conversions maintain timing integrity while ad-hoc conversions utilize idle periods
2Reliability
If the ADC prioritizes scheduled conversions on external channels, then the timing integrity is maintained, but the responsiveness to ad-hoc conversions on internal channels is reduced
Solution Approach 1:
The sequencer implements dynamic scheduling where the priority assignment is not fixed but adapts based on ADC availability. Scheduled conversions maintain high priority when resources are available, while ad-hoc conversions can dynamically access the ADC during idle periods. The sequencer continuously monitors ADC status and adjusts conversion scheduling in real-time
Solution Approach 2:
The system changes the operational parameters of conversion scheduling by introducing different conversion modes (scheduled vs. ad-hoc) with different priority levels. The sequencer modifies the scheduling parameters based on ADC busy/idle status, allowing flexible adjustment between maintaining timing integrity and responding to ad-hoc requests
3Productivity
If the ADC accepts all conversion requests immediately, then the operational efficiency is improved, but the resource conflicts and conversion errors increase
Solution Approach 1:
The sequencer performs preliminary actions by pre-scheduling conversions and pre-checking ADC availability before initiating conversions. It determines whether the ADC is busy before accepting ad-hoc conversion requests, preventing resource conflicts before they occur. The sequencer prepares the conversion schedule in advance, ensuring reliable execution
Data Source
AI summary
A method is provided. In some examples, the method includes receiving, at a sequencer circuit of an analog-to-digital converter (ADC), a first request to perform a first conversion. In addition, the method includes determining, by the sequencer circuit, that the ADC is not busy. The method further includes responsive to determining that the ADC is not busy, and by the sequencer circuit, causing the ADC to perform the first conversion. The method also includes receiving, at the sequencer circuit, a second request to perform a second conversion. The method includes determining, by the sequencer circuit, that the ADC is busy and, responsive to determining that the ADC is busy, and by the sequencer circuit, waiting to cause the ADC to perform the second conversion.