Switched-Capacitor ADC Calibration Using a Supplementary DAC

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current ADC testing processes require high-accuracy test equipment and lengthy calculation times to measure offset and full-scale gain error, especially for low-cost ADC devices, due to the need for non-ideal ramp signals and subsequent noise suppression, leading to increased manufacturing costs and inefficiencies.

Innovation Solution

A switched-capacitor ADC with a built-in supplementary DAC circuit that shifts the DC transfer curve to allow direct measurement of offset and full-scale gain error using on-board voltages, eliminating the need for high-precision analog sources and simplifying the test setup.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If current ADC testing processes use non-ideal ramp signals and noise suppression methods, then measurement accuracy can be maintained, but testing time and calculation time increase significantly

Engineering Contradiction:
ImproveADC parameter measurement accuracyVSAvoidtesting time and calculation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The supplementary DAC circuit pre-shifts the DC transfer curve by a known amount before measurement, so that the measurement process directly captures the offset and gain error without requiring subsequent complex calculations or noise suppression iterations, thereby reducing testing time while maintaining accuracy

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If high-accuracy test equipment is used to measure offset and full-scale gain error, then measurement precision is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improveoffset and gain error measurement accuracyVSAvoidtest equipment complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The ADC device incorporates a built-in supplementary DAC circuit that automatically performs the DC transfer curve shifting function, allowing the device to measure its own parameters using simple on-board voltages without requiring external high-precision test equipment, thus reducing both device complexity and manufacturing cost

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The supplementary DAC circuit serves multiple functions: it shifts the DC transfer curve for offset measurement, shifts it for full-scale gain error measurement, and enables simplified INL and DNL measurements, all using the same built-in circuitry and on-board voltages, eliminating the need for specialized high-precision external equipment

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If built-in supplementary DAC circuit is added to shift DC transfer curve, then measurement process is simplified and testing time is reduced, but device complexity increases

Engineering Contradiction:
Improvemeasurement efficiencyVSAvoidADC circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The supplementary DAC circuit is merged with the existing main DAC circuit and capacitor array of the ADC, sharing common hardware resources such as the capacitor array and control logic, so that the additional functionality is achieved with minimal increase in overall device complexity while significantly improving measurement efficiency

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10897261B1Analog-to-digital converter with a supplementary digital-to-analog converter for offset and gain error measurements
Publication Date: 2021.01.19 INFINEON TECHNOLOGIES AG
  • US10897261B1 patent drawing
  • US10897261B1 patent drawing
  • US10897261B1 patent drawing

AI summary

A switched-capacitor analog-to-digital converter (ADC) includes: a main digital-to-analog converter (DAC) circuit; a comparator coupled to the main DAC circuit and configured to determine whether the input to the comparator exceeds a pre-determined threshold; and a supplementary DAC circuit coupled to the main DAC circuit, wherein the switched-capacitor ADC is configured to operate in at least one of a first mode or a second mode, wherein in the first mode for measuring an offset of the switched-capacitor ADC, the supplementary DAC circuit is configured to shift a voltage at an output of the main DAC circuit by a first value having a first polarity, and wherein in the second mode for measuring a full-scale gain error of the switched-capacitor ADC, the supplementary DAC circuit is configured to shift the voltage at the output of the main DAC circuit by a second value having a second polarity opposite the first polarity.