Time-Domain ADC Calibration Using Comparator-Guided Trim Circuits

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Solution Overview

Problem

Existing analog-to-digital converters (ADCs) face limitations in power efficiency and accuracy due to reliance on voltage domain conversions, which are constrained by the power efficiency of reference voltage generation and timing of comparisons, and time domain converters require large system-on-chip sizes and bandwidth mismatches for calibration.

Innovation Solution

A calibration method using time domain converter circuitry with trim circuitry to adjust delay duration thresholds by comparing input and reference delay durations, employing multiple instances of voltage-to-delay circuitry and comparator circuitry to enhance accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If voltage domain conversion is used in ADC, then the conversion process is straightforward, but power efficiency deteriorates due to reference voltage generation and comparison timing constraints

Engineering Contradiction:

Improveconversion process simplicityVSAvoidpower efficiency

Core Design Contradiction:

Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The patent replaces the voltage domain conversion mechanism with a time domain conversion mechanism. Instead of using voltage comparisons and reference voltage generation, the system uses time delay measurements and pulse width modulation to achieve analog-to-digital conversion, thereby eliminating the power consumption issues associated with voltage domain operations

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the domain of conversion from voltage to time. By measuring time delays instead of comparing voltages, the system achieves better power efficiency while maintaining conversion functionality. The trim circuitry adjusts time delay parameters to calibrate the converter accuracy

Inventive Principle:

Principle #35Parameter changes

2Use of energy by moving object

If time domain converter circuitry is used to improve power efficiency, then power consumption decreases, but measurement accuracy deteriorates due to bandwidth mismatches and calibration requirements

Engineering Contradiction:

Improvepower efficiencyVSAvoidconversion accuracy

Core Design Contradiction:

Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent implements a feedback-based calibration system where the trim circuitry receives feedback from comparator circuitry that measures bandwidth mismatches. The trim circuitry adjusts time delay parameters based on this feedback to compensate for inaccuracies, thereby maintaining high measurement precision while operating in the power-efficient time domain

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The calibration system is integrated within the time domain converter itself, allowing the converter to self-calibrate without requiring external calibration equipment. The trim circuitry automatically adjusts parameters based on internal measurements, eliminating the need for separate calibration systems and reducing overall system complexity

Inventive Principle:

Principle #25Self-service

3Measurement precision

If traditional calibration methods are used for time domain converters, then accuracy can be improved, but system size increases due to large system-on-chip requirements

Engineering Contradiction:

Improveconversion accuracyVSAvoidsystem-on-chip size

Core Design Contradiction:

Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges the calibration functionality with the main time domain converter circuitry. The trim circuitry is integrated alongside the voltage-to-delay circuitry and comparator circuitry, eliminating the need for separate calibration systems and reducing the overall system-on-chip area while maintaining calibration capability

Inventive Principle:

Principle #5Merging (Combining)

4Measurement precision

If multiple instances of voltage-to-delay circuitry and comparator circuitry are added to enhance accuracy, then measurement precision improves, but device complexity increases

Engineering Contradiction:

Improveconversion accuracyVSAvoidcircuitry complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the conversion process into distinct functional blocks: voltage-to-delay conversion, time domain comparison, and trim calibration. Each block performs a specific function with optimized complexity, allowing the system to achieve high precision through modular architecture rather than monolithic complex circuitry

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS12500594B2Methods and apparatus to calibrate analog-to-digital converters

Publication Date: 2025.12.16 TEXAS INSTRUMENTS INC

AI summary

An example apparatus includes: first voltage-to-delay circuitry having an output; second voltage-to-delay circuitry having an output; time domain converter circuitry having a first input, a trim input, and an output, the first input of the time domain converter circuitry coupled to the first voltage-to-delay circuitry; comparator circuitry having a first input, a second input, and an output, the first input of the comparator circuitry coupled to the output of the first voltage-to-delay circuitry and the first input of the time domain converter circuitry, the second input of the comparator circuitry coupled to the output of the second voltage-to-delay circuitry; and trim circuitry having a first input, a second input, and an output, the first input of the trim circuitry coupled to the output of the time domain converter circuitry, the second input of the trim circuitry coupled to the output of the comparator circuitry.