ADC Window-Comparator Testing for Precise Bin Counting
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Solution Overview
Problem
Testing of analog-to-digital converters (ADCs) becomes increasingly challenging and expensive with higher bit numbers and lower reference voltages, as existing methods often result in insufficient test accuracy and yield loss due to poor tester precision.
Innovation Solution
An apparatus comprising an ADC, a sample select unit, a window comparator, and a processor that generates a voltage ramp and selectively associates digital representations with bins based on threshold levels, allowing for precise testing by counting samples within a defined voltage window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If mixed-signal automatic test equipment is used to test ADCs, then test accuracy can be maintained at 1-2 mV, but testing becomes increasingly challenging and expensive with higher bit numbers and lower reference voltages
Solution Approach 1:
The patent segments the ADC testing process into multiple discrete steps: generating a voltage ramp, comparing against threshold levels, selecting samples within the window, and counting occurrences. This segmentation transforms a complex high-precision measurement task into a series of simpler operations that can be performed with lower-precision components.
Solution Approach 2:
The patent introduces a window comparator as an intermediary device between the voltage ramp generator and the sample counter. The window comparator translates the complex task of measuring ADC accuracy into a simpler binary decision process (whether the ramp voltage is within the acceptable window), enabling accurate testing without requiring equally accurate measurement equipment.
2Ease of manufacture
If test limits are set beyond ADC specification, then testing can be performed with available equipment, but the ADC specification is not fully verified and yield loss occurs
Solution Approach 1:
The patent changes the testing parameter from direct voltage measurement (which requires high-precision equipment) to counting the number of times the voltage ramp falls within a specified window. This parameter transformation enables accurate specification verification using lower-precision test equipment, as the counting process is inherently more precise than voltage measurement at the required resolution.
3Measurement precision
If conventional ADC testing methods are used, then testing can be performed, but additional circuitry and resources are required
Solution Approach 1:
The patent makes the delta-sigma ADC serve multiple functions: it acts as both the device under test and part of the test equipment by generating the voltage ramp signal. This multi-functionality eliminates the need for separate high-precision voltage sources and reduces overall circuitry requirements while maintaining accurate testing capability.
Data Source
AI summary
A method for use in testing an analog-to-digital converter. The method includes providing a set of bins, varying a voltage, taking samples of the voltage, providing a selection flag, associating each sample with one bin of the set of bins, and observing a number of samples associated with the bins. An apparatus includes an analog-to-digital converter configured to convert a voltage at an input node to a digital representation provided at an output node. The input node is configured to be coupled to a voltage generator. A sample select unit is configured to determine if a voltage at the input node at least equals a first threshold level and does not exceed a second threshold level. The apparatus is configured, based on the determining, to selectively associate the digital representation with a bin of a set of bins.