Address-Based Word Line Pulse Widths for Low-Power Memory Reads
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Solution Overview
Problem
Conventional memory devices consume excessive power due to uniformly long word line pulse widths, which are necessary to ensure accurate read operations across memory cells with varying bit line lengths, leading to inefficient power usage.
Innovation Solution
The memory device generates word line signals with varying pulse widths based on the address of each memory cell, tailoring the pulse width to match the specific RC characteristics of each bit line, thereby reducing power consumption without compromising read accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniformly long word line pulse widths are used to ensure accurate read operations across all memory cells, then read accuracy is maintained, but power consumption increases excessively
Solution Approach 1:
The patent applies local quality by tailoring the word line pulse width to match the specific RC characteristics of each bit line. Memory cells are grouped into multiple word line groups, where each group is assigned a specific pulse width duration based on its bit line characteristics. This allows each group to receive a customized pulse width that is optimal for its specific electrical characteristics, rather than using a uniform pulse width for all memory cells.
Solution Approach 2:
The patent implements dynamics by making the word line pulse width variable rather than static. The system dynamically selects the appropriate pulse width duration based on which word line group is being accessed. The controller determines the appropriate pulse width based on the address and activates the corresponding word line group with the matched duration, allowing the system to adapt the pulse width to the specific operational requirements of each memory cell group.
2Use of energy by moving object
If varying pulse widths are used to reduce power consumption, then energy efficiency improves, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the memory cell array into multiple word line groups, where each group corresponds to a specific pulse width duration. The word lines are organized into distinct groups (e.g., first group with first duration, second group with second duration, etc.), and each group is controlled by dedicated control signals. This segmentation allows the system to manage complexity by breaking down the varying pulse width control into discrete, manageable groups rather than requiring individual control for each memory cell.
Solution Approach 2:
The patent implements parameter changes by varying the pulse width duration parameter based on the word line group being accessed. The system changes the temporal parameter (pulse width) of the word line signal according to the specific group requirements. This allows the system to achieve power efficiency through parameter variation while maintaining relatively simple control logic that selects from a predefined set of parameter values rather than requiring continuous parameter adjustment.
Data Source
AI summary
A memory device includes a plurality of memory cells, a plurality of word lines, and a word line driver. The word lines are respectively coupled to the memory cells. The word line driver is configured to respectively drive the word lines with word line signals that have varying pulse widths.