Adjustable Body Bias Transistors for IC Performance Optimization
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Solution Overview
Problem
Conventional integrated circuit (IC) devices face performance variations due to manufacturing processes, material variations, temperature changes, and power supply fluctuations, leading to inefficiencies and the need for overdesign, which increases area and power consumption.
Innovation Solution
The implementation of enhanced body effect (EBE) transistors with adjustable body bias voltages, managed by bias control circuits and emulation circuits, allows for precise optimization of transistor performance across different conditions, using a combination of EBE and non-EBE transistors to achieve desired circuit performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional overdesign techniques are used to accommodate transistor variations, then circuit performance reliability is improved, but device area and power consumption increase
Solution Approach 1:
The patent implements dynamic body bias adjustment that allows transistors to adapt their operating characteristics in real-time based on actual performance needs. The bias control circuit dynamically modifies the body bias voltage applied to transistor bodies, enabling the circuit to maintain reliable performance while consuming less power than static overdesign approaches. This dynamic adaptation eliminates the need for continuous excess power consumption that characterizes conventional overdesign.
Solution Approach 2:
The patent changes the electrical parameters of transistors by applying adjustable body bias voltages. The bias control circuit modifies the body-to-source voltage difference, which directly alters the threshold voltage and channel conductivity of the transistors. This parameter adjustment allows the circuit to achieve the desired performance reliability by optimizing transistor characteristics rather than relying on fixed overdesign margins, thereby reducing power consumption.
2Reliability
If conventional overdesign techniques are used to accommodate transistor variations, then circuit performance reliability is improved, but device area increases
Solution Approach 1:
The dynamic body bias adjustment mechanism allows the circuit to achieve performance reliability through temporal adaptation rather than spatial redundancy. Instead of adding extra transistors or larger device areas to accommodate variations, the system dynamically adjusts bias voltages to compensate for performance deviations, maintaining reliability without increasing the physical footprint of the device.
Solution Approach 2:
The patent utilizes parameter changes in the body bias voltage to compensate for transistor performance variations. By adjusting the body bias, the threshold voltage and electrical characteristics of existing transistors are modified to achieve the desired performance level. This approach eliminates the need for additional device area that would be required by conventional overdesign methods, as the same physical transistors can be retuned to meet performance targets.
3Use of energy by moving object
If device features are shrunk and operating voltages are reduced, then power consumption is decreased, but transistor performance variation increases
Solution Approach 1:
The patent implements a feedback mechanism where the bias control circuit monitors transistor performance and adjusts body bias voltages accordingly. This closed-loop control compensates for performance variations that arise from manufacturing tolerances and process variations in scaled devices. By providing real-time feedback and adjustment, the system maintains consistent performance across devices with reduced features and lower operating voltages, effectively counteracting the increased variation that would otherwise result from scaling.
Solution Approach 2:
The patent compensates for increased transistor variation in scaled devices by dynamically changing the body bias parameter. The bias control circuit adjusts the body-to-source voltage difference to counteract performance deviations caused by manufacturing variations. This parameter adjustment allows low-voltage, scaled devices to achieve the desired performance consistency without requiring higher operating voltages or larger feature sizes, thereby maintaining low power consumption while managing variation.
Data Source
AI summary
Circuits, integrated circuits devices, and methods are disclosed that may include biasable transistors with screening regions positioned below a gate and separated from the gate by a semiconductor layer. Bias voltages can be applied to such screening regions to optimize multiple performance features, such as speed and current leakage. Particular embodiments can include biased sections coupled between a high power supply voltage and a low power supply voltage, each having biasable transistors. One or more generation circuits can generate multiple bias voltages. A bias control section can couple one of the different bias voltages to screening regions of biasable transistors to provide a minimum speed and lowest current leakage for such a minimum speed.