Adjustable Memory Self-Test Diagnostics for PVT-Resilient MISR Capture

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Solution Overview

Problem

Conventional semiconductor memory devices face challenges in accurately performing self-tests due to environmental variabilities such as process, voltage, and temperature (PVT) fluctuations, leading to inconsistent and unreliable test outputs.

Innovation Solution

An adjustable diagnostics mechanism, including a memory built-in self-test (mBIST) circuit and a multiple input signature register (MISR) circuit, dynamically adjusts the self-test process to account for real-time conditions, suspending test output storage when necessary to reduce errors and ensure reliable monitoring across varying environments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If self-test is continuously performed under all environmental conditions, then test coverage is improved, but test reliability deteriorates due to PVT fluctuations causing false failures

Engineering Contradiction:
Improvetest coverageVSAvoidtest reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a dynamic self-test mechanism that adjusts test execution and MISR operation based on real-time environmental conditions. The system monitors PVT parameters and dynamically suspends or resumes MISR operations according to current conditions, transforming a static test system into an adaptive one that optimizes both coverage and reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters of the MISR based on environmental conditions. When PVT fluctuations exceed thresholds, the system modifies the MISR's operational state (suspending clocking or enabling/disabling accumulation), allowing the test mechanism to adapt its behavior to maintain reliability while preserving coverage

Inventive Principle:
Principle #35Parameter changes

2Loss of information

If MISR operates continuously to capture all test outputs, then diagnostic data completeness is improved, but error rate increases due to environmental variabilities

Engineering Contradiction:
Improvediagnostic data completenessVSAvoiderror rate
Core Design Contradiction:
Loss of informationVSObject-affected harmful factors

Solution Approach 1:

The patent extracts or removes the harmful influence of environmental PVT fluctuations on test output capture by selectively suspending MISR operations during periods when such fluctuations are detected. This separation allows the system to capture only those test outputs that are not corrupted by environmental interference

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system introduces an intermediary control mechanism that monitors environmental conditions and mediates between the self-test generator and the MISR. This intermediary layer decides when to allow test output capture and when to suspend it, filtering out potentially erroneous data before it enters the diagnostic record

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If self-test is suspended during PVT fluctuations, then test accuracy is improved, but test duration increases due to repeated suspensions and resumptions

Engineering Contradiction:
Improvetest accuracyVSAvoidtest duration
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system implements periodic monitoring of environmental conditions with structured suspension and resumption of MISR operations. Rather than continuous suspension, the system uses periodic checks of PVT parameters and suspends only during specific intervals when fluctuations are detected, minimizing time loss while maintaining accuracy

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system applies partial suspension of MISR operations only during the specific time intervals when PVT fluctuations are detected, rather than suspending the entire test. This partial action approach maintains test accuracy for the portions affected by fluctuations while minimizing the overall time penalty

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12394501B2Apparatus with adjustable diagnostic mechanism and methods for operating the same
Publication Date: 2025.08.19 MICRON TECHNOLOGY INC
  • US12394501B2 patent drawing
  • US12394501B2 patent drawing
  • US12394501B2 patent drawing

AI summary

Methods, apparatuses, and systems may implement adjusted circuit tests. A memory device may include a self-test circuit that is configured to selectively suspend collection and/or processing of test results for one or more portions of the self-test.