Adjustable Write Pulse Generator for Chalcogenide Memory

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Solution Overview

Problem

Existing chalcogenide memory devices require precise control of write current amplitude to ensure uniform programming, but existing technologies lack the necessary precision and flexibility to accurately generate and distribute write pulses across varying temperatures and cell technologies.

Innovation Solution

An adjustable write pulse generator is developed, comprising a band-gap reference current circuit, programmable ring oscillator, frequency divider, and single pulse generator, which generates well-compensated current and adjustable pulse signals to program chalcogenide memory cells, allowing for precise control of write current amplitude and duration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If existing chalcogenide memory devices use conventional write pulse generation methods, then device simplicity is maintained, but write current amplitude precision and uniformity deteriorate

Engineering Contradiction:
Improvewrite current amplitude precisionVSAvoidwrite pulse generator complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements a band-gap reference current circuit that generates temperature-compensated reference currents with precise amplitude control. By changing the reference current parameters based on temperature compensation principles, the system achieves precise write current amplitude control across varying temperatures, resolving the contradiction between precision and simplicity.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs programmable ring oscillators with adjustable pulse widths and frequencies that can be dynamically configured. This dynamic adjustability allows the write pulse generator to adapt to different programming requirements and temperature conditions, achieving precise amplitude and duration control while maintaining reasonable device complexity through programmability.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If existing chalcogenide memory devices use fixed write pulse generation, then device simplicity is maintained, but adaptability to varying temperatures and cell technologies deteriorates

Engineering Contradiction:
Improvetemperature and cell technology adaptabilityVSAvoidwrite pulse generator complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal write pulse generator that can accommodate multiple cell technologies and temperature ranges through a unified architecture. The band-gap reference current circuit and programmable ring oscillator work together to provide temperature-compensated, adjustable write pulses that are adaptable to different chalcogenide cell variants, achieving multi-functionality without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The programmable ring oscillator allows dynamic adjustment of pulse characteristics (width, frequency, amplitude) to adapt to varying temperature conditions and cell technology requirements. This dynamic configurability enables the same hardware to serve multiple applications and environmental conditions, resolving the adaptability-complexity contradiction.

Inventive Principle:
Principle #15Dynamics

3Manufacturing precision

If existing chalcogenide memory devices use conventional pulse generation, then manufacturing simplicity is maintained, but manufacturing precision of write pulses deteriorates

Engineering Contradiction:
Improvewrite pulse amplitude and duration precisionVSAvoidwrite pulse generator implementation ease
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The band-gap reference current circuit uses well-established band-gap reference techniques to generate precise, temperature-compensated current references. By leveraging proven parameter stabilization methods, the patent achieves high manufacturing precision for write current amplitude while relying on conventional band-gap circuit design practices that are relatively easy to manufacture.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an intermediary band-gap reference current circuit between the power supply and the write pulse generation stage. This intermediary provides a stable, precisely controlled current reference that simplifies the downstream pulse generation circuitry, achieving high precision without proportionally increasing overall manufacturing complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables accurate and uniform programming of chalcogenide memory cells by providing multiple timing and amplitude control options, improving the dynamic range and reliability of chalcogenide memory devices across different temperatures and cell technologies.

Implementation Method 1

The band-gap reference current circuit generates a well-compensated current over a predetermined range of temperatures needed to program a chalcogenide memory cell

Methodology Applied
Scientific EffectBand-gap effect:

Implementation Method 2

The programmable ring oscillator generates a first set of continuous write '0' and write '1' pulse signals based on the well-compensated current

Methodology Applied
Scientific EffectOscillator effect:

Implementation Method 3

The frequency divider then divides the first set of continuous write '0' and write '1' pulse signals into a second set of continuous write '0' and write '1' pulse signals

Methodology Applied
Scientific EffectFrequency division:

Data Source

PatentUS8059454B2Adjustable write pulse generator within a chalcogenide memory device
Publication Date: 2011.11.15 OVONYX MEMORY TECHNOLOGY LLC
  • US8059454B2 patent drawing
  • US8059454B2 patent drawing
  • US8059454B2 patent drawing

AI summary

An adjustable write pulse generator is disclosed. The adjustable write pulse generator includes a band-gap reference current, a programmable ring oscillator, a frequency divider and a single pulse generator. The band-gap reference current circuit generates a well-compensated current over a predetermined range of temperatures needed to program a chalcogenide memory cell. The programmable ring oscillator generates a first set of continuous write “0” and write “1” pulse signals based on the well-compensated current. The frequency divider then divides the first set of continuous write “0” and write “1” pulse signals into a second set of continuous write “0” and write “1” pulse signals. The single pulse generator subsequently converts the second set of continuous write “0” and write “1” pulse signals into a single write “0” pulse signal or a single write “1” pulse signal when programming the chalcogenide memory cell.