Adjustment Memory Cells for Data Storage Error Correction
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Solution Overview
Problem
As data storage devices experience increased integration density, the probability of erroneous data readouts rises, necessitating improved error correction performance beyond existing error correction decoding circuits and schemes.
Innovation Solution
A data storage device incorporating a nonvolatile memory device with adjustment memory cells sharing bit lines with target memory cells, where a controller adjusts threshold voltages of these adjustment memory cells based on the threshold voltages of target and adjacent memory cells to enhance error correction by classifying memory cells into recovering, strengthening, or suppressing groups and adjusting their voltages accordingly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If integration density of data storage devices is increased, then storage capacity is improved, but the probability of erroneous data readout increases
Solution Approach 1:
The memory cell array is divided into target memory cells and adjustment memory cells, with further segmentation into recovering groups, strengthening groups, and suppressing groups. This segmentation allows independent voltage adjustment of adjustment memory cells to compensate for errors in target memory cells, thereby maintaining data read accuracy despite increased integration density
Solution Approach 2:
Different adjustment memory cells are assigned different threshold voltage adjustments based on their specific location and error characteristics. The controller selectively increases threshold voltages for adjusting memory cells in recovering groups, maintains voltages for strengthening groups, and decreases voltages for suppressing groups, creating localized quality adjustments that target specific error patterns without affecting the entire array
2Reliability
If error correction decoding circuits and schemes are enhanced, then error correction performance is improved, but device complexity increases
Solution Approach 1:
The system performs preliminary classification of adjustment memory cells into recovering, strengthening, and suppressing groups before error correction decoding. Threshold voltages of adjustment memory cells are adjusted in advance based on this classification, so that when data is read from target memory cells, the error rate is already reduced. This preliminary action reduces the burden on subsequent error correction decoding circuits
Solution Approach 2:
Adjustment memory cells serve as intermediary elements between the physical memory array and the error correction decoding circuit. By adjusting the threshold voltages of these intermediary cells, the system modifies the error characteristics of read data before it reaches the error correction decoder, effectively reducing the complexity and computational burden on the decoding circuit
Data Source
AI summary
A data storage device includes a nonvolatile memory device including a target memory cell and one or more adjustment memory cells sharing bit lines with the target memory cell, one or more of the adjustment memory cell are adjacent memory cells adjacent to the target memory cells, and suitable for reading out data therefrom or storing data therein; and a controller suitable for adjusting threshold voltages of the adjustment memory cells based on threshold voltages it of the target memory cell and the adjacent memory cells.