Analog Front End Quantization Error Compensation for Capacitive Sensing
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Solution Overview
Problem
Capacitive sensing devices face challenges in reducing power consumption while maintaining resolution due to quantization noise limitations, requiring extended sampling durations to achieve desired resolution, which increases power consumption.
Innovation Solution
An analog front-end (AFE) system that includes a current conveyor and an analog-to-digital converter (ADC) with switching circuitry, a delta-sigma modulator, and a decimation filter, which selectively couples and decouples components to adjust the digital output based on quantization error, allowing for reduced sampling duration without compromising resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If extended sampling duration is used to reduce quantization noise and improve resolution, then measurement precision is improved, but use of energy increases
Solution Approach 1:
The system performs preliminary actions by capturing additional samples during the sampling interval and using these samples to calculate quantization error before final conversion. The delta-sigma modulator generates extra bits of information during sampling, and the quantization error is computed in advance, allowing the system to compensate for quantization noise without extending the sampling duration, thus maintaining resolution while reducing power consumption.
Solution Approach 2:
The patent introduces intermediary components including a quantization error calculator that computes error based on additional samples, and a compensator that adjusts the final digital output using this error information. These intermediaries process the raw samples and error data to produce a compensated digital signal with reduced quantization noise, enabling high resolution without extended sampling and thereby reducing power consumption.
2Use of energy by moving object
If sampling duration is reduced to decrease power consumption, then use of energy is improved, but measurement precision deteriorates
Solution Approach 1:
The system changes parameters by utilizing additional bits from the delta-sigma modulator and computing quantization error from extra samples within the same sampling interval. By processing these additional parameters (error values and extra samples) through the compensator, the system achieves higher effective resolution without extending sampling duration, thus reducing power consumption while maintaining measurement precision.
Solution Approach 2:
The patent implements feedback by calculating quantization error from additional samples and feeding this error information back to the output stage through the compensator. The compensator uses this feedback to adjust and correct the final digital output, effectively reducing quantization noise. This feedback mechanism enables the system to achieve high resolution with shorter sampling durations, thereby reducing power consumption.
3Measurement precision
If quantization error compensation is implemented to maintain resolution, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent applies multi-functionality by designing the delta-sigma modulator to serve dual purposes: generating the primary digital output and providing additional samples for quantization error calculation. The same hardware components (switching circuitry, sample holder, calculator) are used to compute error, and the compensator integrates error correction with the output generation process. This universal use of components achieves resolution improvement without proportionally increasing device complexity.
Solution Approach 2:
The system merges multiple functions into integrated circuit blocks: the quantization error calculator combines sampling, error computation, and output generation in a unified structure. The compensator merges error correction with the digital output pathway, and the switching circuitry merges sample selection with error calculation timing. This merging of functions achieves quantization error compensation and resolution improvement while minimizing the increase in device complexity through shared hardware resources.
Data Source
AI summary
An analog front end (AFE) for an input device includes a current conveyor and an analog-to-digital converter (ADC) switchably coupled to the current conveyor. The current conveyor is configured to receive an input signal from a plurality of sensor electrodes. The ADC generates an output value corresponding to a digital representation of the input signal when the ADC is coupled to the current conveyor. Further, the ADC may selectively adjust the output value based at least in part on a state of the ADC when the ADC is decoupled from the current conveyor. In some implementations, the ADC may include a delta-sigma modulator configured to generate an additional sample when the ADC is decoupled from the current conveyor. The ADC may determine an amount of quantization error in the output value based on the additional sample, and adjust the output value when the quantization error exceeds a threshold amount.