Sampler Circuit Calibration Using an AFE Virtual Short
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Solution Overview
Problem
Advanced single-ended links in high-performance computing are prone to noise and inter symbol interference due to cross talk and other distorting sources, requiring accurate offset cancellation in receiver samplers, which existing calibration methods either introduce additional interference or require power-intensive retraining.
Innovation Solution
A method for calibrating sampler offsets by tuning the AFE output to a reference voltage, creating a virtual short between sampler inputs, allowing for block-level calibration without disconnecting the sampler input from the AFE output, and adjusting drive strengths to reduce offsets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing calibration methods use switches to isolate samplers from AFE during calibration, then offset calibration can be performed, but additional inter symbol interference is introduced
Solution Approach 1:
The patent removes the calibration switch from the signal path entirely. Instead of using a switch to isolate the sampler from the AFE during calibration, the method performs calibration in-situ by adjusting the AFE output offset while the sampler remains connected, thereby eliminating the switch-induced inter symbol interference while maintaining calibration capability
Solution Approach 2:
The patent introduces a virtual short circuit as an intermediary mechanism. By tuning the AFE output to match the sampler reference voltage, a virtual short is created between the sampler inputs, enabling offset calibration without physical switches or disconnects, thus avoiding additional interference
2Measurement precision
If system level calibration with training patterns is used, then sampler offsets can be calibrated, but power consumption increases and throughput is reduced
Solution Approach 1:
The patent performs offset calibration as a preliminary action during manufacturing or initial setup, rather than requiring repeated calibration during operation. The calibrated offset values are then stored and used during normal high-speed operation, eliminating the need for continuous power-intensive training sequences
Solution Approach 2:
The patent changes the calibration approach from dynamic system-level training patterns to static AFE output offset adjustment. By modifying the AFE output offset parameter during calibration and storing the results, the system achieves accurate sampler offset calibration without requiring ongoing power consumption for retraining
3Measurement precision
If sampler kickback noise mismatch between calibration and operational modes is reduced, then calibration accuracy improves, but device complexity increases
Solution Approach 1:
The patent merges the calibration mode and operational mode circuits by using the same signal path throughout. The AFE, sampler, and reference voltage circuit remain connected in both modes, with only the AFE output offset being adjusted during calibration. This eliminates the need for separate calibration circuits, switches, or complex mode-changing infrastructure
Data Source
AI summary
For receiver circuits, Sampler offset calibration techniques are provided. In some embodiments, an output of an analog front end circuit may be tuned to a reference level that is used for an input of the sampler, and the sampler may then be calibrated to reduce an offset between its inputs.