Aggressor Wordline Cache Mitigates Row Hammer Attacks
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Solution Overview
Problem
High dynamic random access memory (DRAM) capacity demands are increasing due to high memory intensive workloads and manycore systems, but wordline electromagnetic coupling (crosstalk) leads to reliability issues and potential security vulnerabilities, such as row hammering attacks, which current solutions either underutilize resources, consume excessive power, or compromise system performance.
Innovation Solution
A low-cost hash function-based filter, like a Bloom filter, is used to record vulnerable wordline addresses, and an aggressor wordline cache is employed to alleviate crosstalk by fetching content from the cache instead of DRAM for frequently accessed wordlines, reducing the number of accesses that induce errors in adjacent wordlines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deterministic approaches are used to track frequently targeted wordlines and refresh neighboring wordlines, then reliability against row hammering attacks is improved, but device complexity increases due to deployment of counters uniformly across each DRAM bank
Solution Approach 1:
The patent extracts the counter functionality from the memory bank and places it in the memory controller. Instead of having counters distributed across each DRAM bank, a single counter in the memory controller tracks the number of accesses to each wordline, thereby reducing device complexity while maintaining the ability to detect and mitigate row hammering attacks
Solution Approach 2:
The memory controller is given the additional function of tracking wordline access frequencies and identifying aggressor wordlines, in addition to its existing memory management functions. This multi-functional approach eliminates the need for separate counter hardware in each bank, reducing overall device complexity
2Reliability
If probabilistic approaches are used to refresh victim rows using a Random Number Generator, then reliability against row hammering attacks is improved, but use of energy increases due to the complexity and power consumption of true RNGs
Solution Approach 1:
The patent uses a linear congruential generator (LCG) algorithm that is computationally inexpensive and requires minimal energy to execute, replacing complex hardware RNGs. The software-based approach consumes significantly less energy while providing sufficient randomness for identifying victim wordlines
3Reliability
If software solutions are used to detect aggressor rows using last-level cache miss rate and row accesses with high temporal locality, then reliability against row hammering attacks is improved, but productivity decreases due to sacrifice of system performance
Solution Approach 1:
The patent performs preliminary identification of aggressor wordlines by tracking access patterns before they can cause damage. By maintaining a count of accesses to each wordline and proactively identifying aggressors before they trigger row hammering effects, the system can take preventive actions without impacting normal memory operations or system performance
4Quantity of substance
If DRAM capacity is increased by scaling down memory technology and reducing cell size, then quantity of substance increases, but reliability deteriorates due to increased wordline electromagnetic coupling and crosstalk
Solution Approach 1:
The patent implements a feedback mechanism that monitors wordline access patterns and uses this information to identify and protect victim wordlines. By continuously tracking aggressor wordline accesses and responding by refreshing or protecting adjacent victim wordlines, the system compensates for the increased crosstalk effects caused by scaled-down cell dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively mitigates wordline crosstalk and defends against row hammering attacks by reducing memory access times and enhancing security without significant performance or energy efficiency sacrifices.
Implementation Method 1
A low-cost hash function-based filter, like a Bloom filter, is used to record vulnerable wordline addresses
Implementation Method 2
wordline electromagnetic coupling (crosstalk) considerably increases in technology nodes below the 22 nm process node
Data Source
AI summary
An integrated circuit includes an aggressor wordline cache and logic that determines a candidate upper adjacent address and a candidate lower adjacent address of a target memory row corresponding to a read request to memory. When at least one of the candidate upper adjacent address or the candidate lower adjacent address are determined to be a victim row, the logic checks the aggressor wordline cache for a cache hit for the target memory row. When there is a cache hit in the aggressor wordline cache, the logic sends a corresponding cache line as a response to the read request, otherwise the logic causes a read of content from the memory. In certain examples, the logic includes a stored bit array and a hash function-based filter, which determines whether any of the candidate upper adjacent address and the candidate lower adjacent address are victim rows represented in the stored bit array.