Air Gap Isolation for Stress-Sensitive Semiconductor Regions

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-frequency semiconductor devices are prone to stress-induced failures due to thermal expansion mismatches between the semiconductor die and interconnect structures, which can disrupt signal processing and reduce device lifespan.

Innovation Solution

A method is introduced to create an air gap adjacent to the stress-sensitive regions of semiconductor dies within wafer-level chip scale packages, using a dam material or insulating layer to prevent encapsulants from contacting these regions, thereby isolating them from stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the encapsulant contacts the stress sensitive region, then the device structure is simple and manufacturing is easy, but thermal expansion stress disrupts signal processing and reduces device reliability

Engineering Contradiction:
Improvedevice reliabilityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the encapsulant structure by introducing an air gap that divides the encapsulant into separate regions. This segmentation isolates the stress-sensitive region from thermal expansion forces while maintaining encapsulation of other areas, thus improving reliability without fully complicating the package structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The air gap acts as an intermediary element between the encapsulant and the stress-sensitive region. It mediates the thermal expansion forces by providing a stress-free zone that prevents direct transmission of stress to the sensitive circuits, thereby protecting device reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the air gap is formed using dam material or insulating layer, then stress on high-frequency circuits is reduced, but manufacturing process complexity increases

Engineering Contradiction:
Improvesignal processing reliabilityVSAvoidmanufacturing process ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The dam material or insulating layer is applied in advance during the packaging process to pre-establish the air gap structure before final encapsulation. This preliminary action ensures the stress-sensitive region is protected from the outset, maintaining signal processing reliability while integrating the protection into the existing manufacturing workflow

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies the dam material or insulating layer only in specific locations where stress-sensitive regions exist, rather than uniformly across the entire device. This localized application reduces stress on high-frequency circuits while minimizing the additional manufacturing complexity to only the necessary areas

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The air gap effectively reduces stress on high-frequency signal processing circuits, enhancing device reliability and extending lifespan by preventing thermally induced stress from interfering with signal processing.

Implementation Method 1

High-frequency semiconductor devices are prone to stress-induced failures due to thermal expansion mismatches between the semiconductor die and interconnect structures

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS8530274B2Semiconductor device and method of forming air gap adjacent to stress sensitive region of the die
Publication Date: 2013.09.10 STATS CHIPPAC LTD
  • US8530274B2 patent drawing
  • US8530274B2 patent drawing
  • US8530274B2 patent drawing

AI summary

A semiconductor device is made by mounting an insulating layer over a temporary substrate. A via is formed through the insulating layer. The via is filled with conductive material. A semiconductor die has a stress sensitive region. A dam is formed around the stress sensitive region. The semiconductor die is mounted to the conductive via. The dam creates a gap adjacent to the stress sensitive region. An encapsulant is deposited over the semiconductor die. The dam blocks the encapsulant from entering the gap. The temporary substrate is removed. A first interconnect structure is formed over the semiconductor die. The gap isolates the stress sensitive region from the first interconnect structure. A shielding layer or heat sink can be formed over the semiconductor die. A second interconnect structure can be formed over the semiconductor die opposite the first interconnect structure.