Air Gap Under Passive Devices to Reduce Parasitic Shunt Capacitance

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Solution Overview

Problem

The miniaturization of semiconductor components leads to increased parasitic shunt capacitance between passive devices and the substrate, affecting the tuning range and quality factor of resonant circuits, which is not adequately addressed by existing techniques.

Innovation Solution

Incorporating an air gap in the dielectric layer beneath passive devices, formed using a nanostructure-gap pattern, to reduce the dielectric constant and minimize parasitic shunt capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If miniaturization of semiconductor components is pursued, then device size is reduced and integration density is improved, but parasitic shunt capacitance between passive devices and substrate increases

Engineering Contradiction:
Improvedevice sizeVSAvoidparasitic shunt capacitance
Core Design Contradiction:
Volume of moving objectVSObject-generated harmful factors

Solution Approach 1:

An air gap is introduced as an intermediary layer between the passive device and the substrate. This air gap acts as a mediator that electrically isolates the passive device from the substrate, thereby reducing parasitic shunt capacitance while allowing the device to maintain miniaturized dimensions

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The air gap structure creates a porous or void space within the dielectric layer beneath the passive device. This porous structure (air-filled void) reduces the effective dielectric constant in the region between the passive device and substrate, thereby minimizing parasitic capacitance effects

Inventive Principle:
Principle #31Porous materials

2Object-generated harmful factors

If parasitic shunt capacitance is reduced by increasing spacing between passive devices and substrate, then capacitance decreases, but device area increases

Engineering Contradiction:
Improveparasitic shunt capacitanceVSAvoiddevice area
Core Design Contradiction:
Object-generated harmful factorsVSArea of stationary object

Solution Approach 1:

The air gap is implemented locally only in specific regions where passive devices are positioned, rather than throughout the entire device structure. This localized approach reduces parasitic capacitance at critical interfaces while maintaining compact overall device area

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Instead of increasing horizontal spacing between components to reduce capacitance, the solution introduces a vertical dimension by creating an air gap in the z-direction between the passive device and substrate. This dimensional transition allows capacitance reduction without expanding the device footprint

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The air gap effectively reduces parasitic shunt capacitance, enhancing the tuning range and quality factor of resonant circuits by lowering the dielectric constant beneath passive devices.

Implementation Method 1

Incorporating an air gap in the dielectric layer beneath passive devices, formed using a nanostructure-gap pattern, to reduce the dielectric constant and minimize parasitic shunt capacitance

Methodology Applied
Scientific EffectDielectric constant reduction: Dielectric Permittivity

Data Source

PatentUS11289365B2Air gap underneath passive devices
Publication Date: 2022.03.29 QUALCOMM INC
  • US11289365B2 patent drawing
  • US11289365B2 patent drawing
  • US11289365B2 patent drawing

AI summary

Certain aspects of the present disclosure generally relate to a semiconductor device including an air gap underneath passive devices. The semiconductor device generally includes a substrate layer, a passive device layer, and a dielectric layer disposed between the substrate layer and the passive device layer, wherein the dielectric layer includes an air gap disposed beneath at least one passive device in the passive device layer.