Air Voids in Buffer Layer for UV Light Extraction
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Solution Overview
Problem
Ultraviolet light emitting devices face challenges in light extraction efficiency due to total reflection at the interface between the buffer layer and sapphire substrate, and controlling air voids to improve this efficiency is difficult.
Innovation Solution
The semiconductor device incorporates a substrate with a concavo-convex pattern and air voids above it, featuring uniform shapes and sizes with inclined facets to block threading dislocations and enhance light scattering, thereby improving epitaxial growth quality and light extraction efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If air voids are formed in the buffer layer to improve light extraction efficiency, then light extraction efficiency is improved, but control of the air voids becomes difficult
Solution Approach 1:
The patent employs a porous buffer layer structure with air voids to improve light extraction efficiency. The buffer layer is designed with controlled porosity to scatter light and reduce total internal reflection at the sapphire-substrate interface, thereby enhancing LED performance while managing the complexity of void formation.
Solution Approach 2:
The patent optimizes parameters such as void size, distribution, and concentration in the buffer layer to achieve improved light extraction. By carefully controlling these parameters during manufacturing, the patent balances light extraction enhancement with manufacturability, addressing the contradiction between performance improvement and control difficulty.
2Illumination intensity
If a flat buffer layer interface is used, then manufacturing is simple, but light extraction efficiency is degraded due to total reflection
Solution Approach 1:
The patent introduces a curved or non-planar interface structure in the buffer layer with air voids, replacing the flat interface. This curvature creates light scattering centers that reduce total internal reflection, improving light extraction efficiency while adding controlled complexity to the manufacturing process.
Solution Approach 2:
The porous buffer layer with air voids creates an optimized optical interface that balances manufacturing feasibility with light extraction performance. The voids are strategically positioned to scatter light without requiring overly complex manufacturing steps, resolving the contradiction between simple fabrication and high light extraction efficiency.
3Reliability
If threading dislocations are not blocked, then epitaxial growth is faster, but device quality and reliability are degraded
Solution Approach 1:
The patent introduces the buffer layer with air voids as an intermediary structure between the sapphire substrate and the active LED layers. This intermediary blocks threading dislocations from propagating into the active region, improving device reliability and quality while allowing the epitaxial growth process to proceed at practical rates.
Solution Approach 2:
The porous buffer layer acts as a dislocation filter, where the air voids interrupt the propagation path of threading dislocations. This porous structure enables the system to achieve both high device quality through dislocation blocking and maintained productivity by not significantly hindering the epitaxial growth rate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances light extraction efficiency and orientation angle by inducing light scattering and blocking threading dislocations, leading to improved performance in ultraviolet light emitting devices.
Implementation Method 1
a plurality of air voids provided in the buffer layer. The air void may have at least two inclined facets... to induce light scattering, thereby increasing light extraction efficiency
Implementation Method 2
the voids are provided above the concavo-convex pattern to block the threading dislocations, thereby improving the quality of epitaxial growth of the light emitting device
Implementation Method 3
a light emitting diode (LED) includes a p-n junction diode having a characteristic of converting electric energy into light energy
Implementation Method 4
the void having the inclined facet with the specific slope is provided above the concavo-convex pattern, thereby enhancing the orientation angle
Data Source
Figure 1~2
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AI summary
A semiconductor device according to an embodiment comprises: a substrate; a buffer layer provided on the substrate; a first conductivity type semiconductor layer provided on the buffer layer; a second conductivity type semiconductor layer; a light emitting structure, provided between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, comprising an active layer which emits ultraviolet light; and a plurality of air voids provided within the buffer layer, wherein the air voids can be formed to have two or more inclined surfaces.