Atomic Layer Deposition for Discrete Charge Trapping Islands
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing atomic layer deposition methods for semiconductor manufacturing result in continuous distribution layers, which are not suitable for high aspect ratio structures and do not achieve uniform size distribution of discrete atomic islands in charge trapping layers, leading to increased lateral current leakage and reduced memory capacity.
Innovation Solution
An atomic layer deposition method that forms discrete compound monolayers with uniform size distribution by controlling the flow rate and time of precursor gases, allowing for the formation of discrete atomic islands at the atomic level, which are then sealed within a dielectric layer to improve charge trapping efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical vapor deposition or physical vapor deposition is used to form charge trapping layer, then atomic islands can be formed, but the size distribution of the atomic islands is non-uniform and the size is large (10 nm-100 nm)
Solution Approach 1:
The charge trapping layer is segmented into discrete atomic islands rather than forming a continuous layer. The ALD process deposits precursor materials that nucleate as separate atomic-scale islands on the substrate, with each island being only a few atoms in size. This segmentation achieves uniform size distribution at the atomic level while preventing lateral current leakage between adjacent islands.
Solution Approach 2:
The patent changes the deposition parameters by using atomic layer deposition with controlled precursor flow rates and pulse times. By precisely controlling the deposition conditions (temperature, pressure, gas flow), the process forms atomic islands with uniform size at the atomic level, contrasting with the larger 10-100 nm islands formed by conventional CVD or PVD methods.
2Ease of manufacture
If continuous distribution layer is formed by atomic layer deposition, then the layer can be formed in holes and trenches, but lateral current leakage increases and memory capacity is reduced
Solution Approach 1:
The continuous distribution layer is replaced by discrete atomic islands separated by insulating dielectric material. This segmentation eliminates the lateral current leakage pathways that exist in continuous layers, while the islands remain confined within holes and trenches to maintain manufacturability in high aspect ratio structures.
Solution Approach 2:
A dielectric layer is introduced as an intermediary material between and around the atomic islands. This dielectric medium acts as an electrical insulator that prevents lateral current leakage between adjacent islands, while still allowing the islands to be formed in high aspect ratio holes and trenches through the ALD process.
3Reliability
If charge trapping layer with certain thickness is used, then the layer can be formed, but the thickness cannot be reduced and memory capacity is limited
Solution Approach 1:
The charge trapping function is achieved through multiple discrete atomic islands distributed within a thinner overall layer structure. Each atomic island acts as an independent charge trapping site, and the collective ensemble of islands provides sufficient charge trapping capability while reducing the overall layer thickness compared to conventional continuous layers.
Solution Approach 2:
The patent changes the structural parameter from a continuous thick layer to discrete atomic-scale islands distributed in a thinner matrix. By controlling the density and distribution of atomic islands through ALD, the charge trapping capability is maintained or enhanced while the overall layer thickness is reduced, improving memory capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the density and charge trapping capability of the charge trapping layer, reducing lateral current leakage and improving memory capacity, even in semiconductor devices with small line widths, by achieving uniform and controllable discrete island distribution.
Implementation Method 1
flowing a first precursor gas to the semiconductor substrate within the atomic layer deposition chamber to form a first discrete monolayer on the semiconductor substrate
Implementation Method 2
flowing an inert purge gas to the semiconductor substrate within the atomic layer deposition chamber to remove the first precursor gas which does not form the first monolayer on the semiconductor substrate
Implementation Method 3
flowing a second precursor gas to the atomic layer deposition chamber to react with the first precursor gas which forms the first island, thereby forming a first discrete compound monolayer
Implementation Method 4
Atomic layer deposition involves the deposition of successive monolayers over a substrate within a deposition chamber typically maintained at a negative pressure (sub-atmospheric pressure)
Data Source
AI summary
There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within the ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; and forming a second discrete compound monolayer above the semiconductor substrate by the same process as that for forming the first discrete compound monolayer. There is also provided a semiconductor device in which the charge trapping layer is a dielectric layer containing the first and second discrete compound monolayers formed by the ALD method.