All-Around Gate FET for Terahertz Power Delivery
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Solution Overview
Problem
Conventional solid-state devices face limitations in delivering high power and high frequency simultaneously due to issues like short channel effects and low operating voltage, which restrict their performance at Terahertz frequencies.
Innovation Solution
The development of an all-around gate field effect transistor (AAGFET) with a multichannel epitaxial structure and a wrap-around gate, utilizing AlGaN/GaN superlattice channels to achieve low channel resistance and high operating voltage, enabling high-frequency and high-power performance without extreme geometry scaling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional solid-state devices are used to achieve high frequency performance, then frequency response is improved, but operating voltage must be reduced and power delivery is limited
Solution Approach 1:
The gate contact is extended from a conventional planar configuration into the third dimension by wrapping around and contacting the bottom surface of the channel structure. This three-dimensional gate configuration enables simultaneous achievement of high frequency response through improved channel control and high power delivery through maintained operating voltage, resolving the trade-off between frequency performance and power capability
2Speed
If the channel length is reduced to improve frequency response, then speed is improved, but short channel effects increase and control becomes difficult
Solution Approach 1:
By extending the gate contact to wrap around and contact the bottom surface of the channel, the gate control is enhanced in the vertical dimension. This allows for shorter channel lengths that improve frequency response while maintaining effective electrostatic control through the additional bottom contact, preventing short channel effects
Solution Approach 2:
The gate contact structure is nested around the channel structure, with the conductive contact wrapping around and substantially surrounding the bridge. This nested configuration provides enhanced gate control over the channel, enabling better management of short channel effects while maintaining short channel lengths for high frequency operation
3Speed
If extreme geometry scaling is applied to achieve high frequency performance, then frequency response is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
Instead of relying solely on extreme two-dimensional geometry scaling, the invention utilizes three-dimensional gate configuration where the contact wraps around the channel structure. This approach achieves high frequency performance through improved electrostatic control in the vertical dimension rather than requiring extreme horizontal scaling, thereby reducing device complexity and manufacturing difficulty
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The AAGFET device provides ultra-low parasitic resistance, high transconductance, and high output impedance, enabling high-frequency performance up to the Terahertz range with improved operating voltage, addressing the limitations of existing devices.
Implementation Method 1
Certain heterostructure materials, such as Aluminum Gallium Nitride (AlGaN) and GaN, create an electron well (i.e., a sheet of electrons) at the interface between the two dissimilar materials resulting from the piezoelectric effect and spontaneous polarization effect therebetween.
Implementation Method 2
Certain heterostructure materials, such as Aluminum Gallium Nitride (AlGaN) and GaN, create an electron well (i.e., a sheet of electrons) at the interface between the two dissimilar materials resulting from the piezoelectric effect and spontaneous polarization effect therebetween.
Data Source
AI summary
A device is provided that comprises a first pillar disposed in a first region and overlying a base structure, and a second pillar disposed in a second region and overlying the base structure and being spaced apart from the first pillar by a device region. A bridge is disposed in the device region with a first end connected to the first pillar and a second end connected to the second pillar. The bridge includes a top, sides, and a bottom. The bridge is formed from one or more heterostructures with an undercut opening extending from the bottom to an underlying structure. A four-sided conductive contact wraps around and substantially surrounds the bridge around its top, its sides, and its bottom along at least a portion of its length between the first and second end.


