AlN Barrier Stack Thickness Control for Low-Leakage P-Channel TFTs
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Solution Overview
Problem
P-channel thin film transistors (TFTs) manufactured using printed and thin film doped polysilicon processing often exhibit high off-state leakage due to impurities, defects, and uncontrolled threshold voltage (Vt), which affects product performance and battery life, as conventional methods lack channel doping for Vt modulation.
Innovation Solution
A barrier stack comprising a substrate with a first barrier layer, an insulator layer, and a second and third barrier layer, where the second and third barrier layers have thicknesses less than the first, is used to control the threshold voltage of p-channel TFTs by varying the thickness of the topmost AlN layer using a blocking mask scheme, thereby reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional printed and thin film doped polysilicon processing is used to manufacture p-channel TFTs, then manufacturing simplicity is maintained, but high off-state leakage occurs due to uncontrolled threshold voltage
Solution Approach 1:
The barrier layer is segmented into multiple layers with different thicknesses - a first barrier layer and a second barrier layer with different thickness values. This segmentation allows independent optimization of each layer's thickness to control threshold voltage while maintaining manufacturing simplicity through standard deposition processes
Solution Approach 2:
Different regions of the transistor are provided with different barrier layer thicknesses - the first barrier layer has a first thickness in first regions while the second barrier layer has a second thickness in second regions. This local quality variation enables region-specific threshold voltage control to reduce off-state leakage in critical areas
2Manufacturing precision
If conventional barrier layers are used without thickness variation, then manufacturing process is simple, but threshold voltage control is impossible
Solution Approach 1:
The thickness parameter of the barrier layers is changed to control threshold voltage. By varying the thickness of the first and second barrier layers differently across regions, precise threshold voltage control is achieved. The method uses standard deposition processes with controlled thickness parameters rather than requiring complex doping operations
3Manufacturing precision
If channel doping is used to control threshold voltage, then Vt modulation is achieved, but manufacturing process becomes incompatible with printed and thin film processing
Solution Approach 1:
The electrical doping process is replaced with a physical barrier layer thickness control mechanism. Instead of using chemical doping to modulate threshold voltage, the invention uses mechanical control of barrier layer thickness during deposition to achieve the same effect, making it compatible with printed and thin film processing methods
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively lowers the threshold voltage of p-channel TFTs, significantly reducing leakage current by orders of magnitude, thereby enhancing the performance and battery life of wireless communication tags.
Implementation Method 1
The AlN layers 120 and 140 inhibit or prevent metal atoms from diffusing into structures (e.g., transistor channels) subsequently formed on or over the AlN layer 140
Data Source
AI summary
The present disclosure pertains to a barrier stack for thin film and/or printed electronics on substrates having a diffusible element and/or species, methods of manufacturing the same, and methods of inhibiting or preventing diffusion of a diffusible element or species in a substrate using the same. The barrier stack includes a first barrier layer on the substrate, an insulator layer on the first barrier layer, a second barrier layer on the insulator layer in a first region of the substrate, and a third barrier layer on the insulator layer in a second region of the substrate and on the second barrier layer in the first region. Each of the second and third barrier layers has a thickness less than that of the first barrier layer.