Alternating Dielectric Package Substrate for Fine-Pitch Via Alignment
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Solution Overview
Problem
Current packaging technologies face challenges in achieving fine bump pitches due to high cumulative Bump Thickness Variation and significant stresses at via locations, which impact manufacturing yield and reliability, especially when trying to reduce bump pitch from 25 micrometers to 18 micrometers, and misalignment issues with via-pads and fiducials lead to device failures and increased costs.
Innovation Solution
A package substrate with alternating dielectric material layer pairs, where conductive vias in a positive-type photo-imageable dielectric are directly attached to conductive traces in a negative-type photo-imageable dielectric through an insulative material that absorbs electromagnetic radiation, allowing for zero-misalignment and reduced stress via staggering, enabling finer pitch interconnections without the limitations of traditional lithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional lithography is used to reduce bump pitch from 25 micrometers to 18 micrometers, then finer pitch interconnections are achieved, but cumulative Bump Thickness Variation and stress at via locations increase, impacting manufacturing yield and reliability
Solution Approach 1:
The patent divides the dielectric structure into alternating pairs of positive-type and negative-type photo-imageable dielectric layers. This segmentation allows each layer type to be processed independently with its own lithography parameters, enabling finer pitch control (18 micrometers) while maintaining thickness uniformity. The segmented layer structure reduces cumulative Bump Thickness Variation by preventing error propagation across the entire dielectric stack.
Solution Approach 2:
The patent applies different dielectric material properties locally - positive-type photo-imageable dielectric in alternating layers versus negative-type photo-imageable dielectric in alternating layers. Each material type has optimized characteristics for its specific processing requirements, allowing local optimization of via formation and trace patterning. This local quality approach reduces stress concentration at via locations while achieving the desired fine pitch interconnections.
2Manufacturing precision
If traditional lithography is used to reduce bump pitch from 25 micrometers to 18 micrometers, then finer pitch interconnections are achieved, but stress at via locations increases, impacting reliability
Solution Approach 1:
The alternating layer structure segments the stress distribution throughout the dielectric stack. By interspersing positive-type and negative-type dielectric layers, the patent creates a segmented stress field that prevents stress concentration at single via locations. This segmentation reduces the cumulative stress effect while enabling the reduced 18 micrometer bump pitch.
Solution Approach 2:
The patent uses composite dielectric structures combining positive-type and negative-type photo-imageable dielectric materials in alternating layers. This composite approach allows optimization of stress characteristics - the alternating materials have different mechanical properties that collectively reduce stress at via locations while maintaining the fine pitch geometry required for 18 micrometer bump pitch interconnections.
3Manufacturing precision
If via-pads and fiducials are used for alignment, then lithography alignment is achieved, but misalignment issues occur leading to device failures and increased costs
Solution Approach 1:
The patent implements self-aligned via formation where the via pattern is automatically registered to the trace pattern through the alternating positive/negative dielectric layer structure. The self-service alignment mechanism eliminates the need for separate via-pads and fiducials, as the lithography process inherently aligns vias to traces through the material properties and processing sequence of the alternating dielectric layers, reducing misalignment-related device failures.
Solution Approach 2:
The alternating dielectric layer structure performs preliminary alignment preparation by establishing a self-registering framework before via formation. The positive-type and negative-type layers are deposited and processed in a predetermined sequence that pre-establishes the alignment relationship between vias and traces, eliminating the need for subsequent alignment adjustments and reducing misalignment issues that lead to device failures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the achievement of finer pitch interconnections with improved manufacturing yield and reduced stress, enhancing the reliability and cost-effectiveness of die-to-die connections in microelectronic assemblies.
Implementation Method 1
an insulative material between the first layer and the second layer, the insulative material configured to absorb electromagnetic radiation having wavelength in a range between 10 nanometers and 800 nanometers
Implementation Method 2
the first organic dielectric material comprises a positive-type photo-imageable dielectric that is soluble upon exposure to the electromagnetic radiation
Implementation Method 3
the second organic dielectric material comprises a negative-type photo-imageable dielectric that is insoluble upon exposure to the electromagnetic radiation
Data Source
AI summary
Embodiments of a package substrate includes: a conductive via in a first layer, the first layer comprising a positive-type photo-imageable dielectric; a conductive trace in a second layer, the second layer comprising a negative-type photo-imageable dielectric; and an insulative material between the first layer and the second layer, the insulative material configured to absorb electromagnetic radiation in a wavelength range between 10 nanometers and 800 nanometers. The conductive via is directly attached to the conductive trace through the insulative material, the positive-type photo-imageable dielectric is soluble in a photoresist developer upon exposure to the electromagnetic radiation, and the negative-type photo-imageable dielectric is insoluble in the photoresist developer upon exposure to the electromagnetic radiation.


