Alternating Read Mode for Flash Memory Coupling Compensation
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Solution Overview
Problem
The challenge in non-volatile semiconductor memory, particularly in multi-state flash memory devices, is the floating gate to floating gate coupling phenomenon, which leads to erroneous readings due to shifts in apparent charge storage, exacerbated by shrinking memory cell sizes and reduced spacing between word and bit lines, causing increased coupling and reduced separation between data states.
Innovation Solution
The read process for a targeted memory cell includes compensation for neighboring memory cells by intermixing read operations, applying different voltages based on the condition of neighboring cells to mitigate the coupling effect, thereby ensuring accurate data retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell sizes are shrunk and spacing between word and bit lines is reduced, then storage density is improved, but floating gate to floating gate coupling increases causing erroneous readings
Solution Approach 1:
The patent applies preliminary action by performing read operations on neighboring memory cells before reading the target memory cell. This preliminary read allows the system to determine the charge state of neighboring cells and apply appropriate compensation voltages during the subsequent target cell read, thereby preventing coupling effects from distorting the measurement.
Solution Approach 2:
The patent implements feedback by using the read results from neighboring memory cells to dynamically adjust the read voltage applied to the target memory cell. The system continuously monitors neighboring cell states and modifies the compensation voltage accordingly, creating a closed-loop system that actively counteracts coupling effects.
2Measurement precision
If read operations are performed on neighboring memory cells to compensate for coupling effects, then reading accuracy is improved, but read operation complexity and time increase
Solution Approach 1:
The patent merges the read operations for neighboring cells and target cells into a single integrated process. By combining these operations and using the neighboring cell reads to inform the target cell read voltage, the system achieves compensation without requiring completely separate operational sequences, thereby limiting the increase in complexity.
Solution Approach 2:
The patent employs periodic action by alternating between reading neighboring cells and reading target cells in a structured sequence. This periodic pattern allows the system to systematically apply compensation while maintaining a predictable and manageable operational rhythm, preventing excessive complexity accumulation.
3Measurement precision
If multiple read voltages are applied based on neighboring cell conditions, then data state separation is maintained, but energy consumption and operation time increase
Solution Approach 1:
The patent applies local quality by tailoring the read voltage specifically to the conditions of each target memory cell based on its neighboring cells' states. Rather than applying different voltages universally, the system adjusts voltages locally for each read operation, ensuring data state separation is maintained while minimizing unnecessary energy expenditure on cells that don't require compensation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the impact of floating gate to floating gate coupling, enhancing the accuracy of data reading in multi-state flash memory devices by compensating for neighboring cell conditions during the read process, thus maintaining data state separation and reliability.
Implementation Method 1
shifts in the apparent charge stored on a floating gate can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates
Data Source
AI summary
Shifts in the apparent charge stored on a floating gate (or other charge storage element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge stored in adjacent floating gates (or other charge storing elements). To account for this coupling, the read process for a targeted memory cell will provide compensation to an adjacent memory cell (or other memory cell) in order to reduce the coupling effect that the adjacent memory cell has on the targeted memory cell. The compensation applied is based on a condition of the adjacent memory cell. To apply the correct compensation, the read process will at least partially intermix read operations for the adjacent memory cell with read operations for the targeted memory cell.