Amorphous Silicon Etch Target Layer for Alignment Precision
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Solution Overview
Problem
As semiconductor devices integrate to finer line widths, forming patterns with precise alignment becomes challenging due to sidewall roughness issues when etching crystalline silicon and low transmittance in amorphous silicon layers, affecting alignment precision.
Innovation Solution
A method involving ion implantation to partially amorphize an etch target layer on a substrate, using silicon, boron, phosphor, arsenic, germanium, or indium ions, followed by photolithography to create a pattern with improved alignment precision and reduced sidewall roughness by etching the amorphous portion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an opening is formed by etching a layer including crystalline silicon, then the etching process can proceed effectively, but the sidewall of the opening may be formed along a grain boundary to adversely increase the roughness of the sidewall
Solution Approach 1:
The patent changes the physical state of the silicon material from crystalline to amorphous through ion implantation. This parameter change eliminates grain boundaries while maintaining etchability, thereby resolving the contradiction between effective etching and sidewall smoothness
Solution Approach 2:
The patent utilizes phase transition of silicon from crystalline state to amorphous state via ion implantation. The amorphous silicon lacks grain boundaries present in crystalline silicon, enabling smooth sidewalls during etching while maintaining the material's structural integrity
2Manufacturing precision
If an opening is formed by etching a layer including amorphous silicon, then the sidewall profile can be improved, but the transmittance of the etch target layer may be low, which can deteriorate alignment
Solution Approach 1:
The patent applies local quality by creating a dual-structure etch target layer: the lower portion is amorphous silicon for smooth sidewall etching, while the upper portion is crystalline silicon for high optical transmittance and alignment precision. Each region has optimized properties for its specific function
Solution Approach 2:
The etch target layer is segmented into two distinct regions with different material properties. The lower segment is amorphous silicon for sidewall control, and the upper segment is crystalline silicon for alignment, allowing each segment to independently optimize its function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances alignment precision and reduces sidewall roughness in semiconductor device manufacturing by utilizing the high transparency of crystalline portions for alignment and etching the amorphous portions to form openings with desired profiles.
Implementation Method 1
amorphizing the etch target layer in the first region may include an ion implantation process
Implementation Method 2
the crystalline portion (120b) may have a relatively high transparency, the position of a first alignment mark (110) in the second region (II) may be easily detected
Data Source
AI summary
An alignment mark is formed on a substrate including a first region and a second region. The alignment mark is formed in the second region. An etch target layer including a crystalline material is formed on the alignment mark and the substrate. The etch target layer in the first region is partially amorphized. The amorphized etch target layer is etched to form an opening.