Amorphous Silicon Electrode Layout for Maskless Display Manufacturing
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Solution Overview
Problem
Existing display device manufacturing processes are costly and complex due to the need for masks in forming electrodes and insulating layers.
Innovation Solution
The use of amorphous silicon layers doped with N-type and P-type dopants to form electrodes, eliminating the need for masks in the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If masks are used to form electrodes and insulating layers, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts and eliminates the mask component from the manufacturing process. Instead of using physical masks to define electrode and insulating layer patterns, the invention uses direct deposition and self-aligned formation methods, removing the mask-related complexity while maintaining pattern precision through alternative mechanisms.
Solution Approach 2:
The patent applies preliminary action by pre-forming the substrate structure and using self-aligned deposition techniques where subsequent layers automatically align with previous ones. This eliminates the need for separate mask alignment steps, reducing process complexity while ensuring precise positioning of electrodes and insulating layers.
2Manufacturing precision
If masks are used to form electrodes and insulating layers, then manufacturing precision is improved, but productivity decreases
Solution Approach 1:
By removing masks from the process, the patent eliminates time-consuming mask deposition, alignment, and removal steps. This directly increases manufacturing throughput while maintaining precision through self-aligned formation methods that integrate pattern definition into the deposition process itself.
Solution Approach 2:
The patent enables continuous manufacturing by eliminating the interruptive mask steps. The self-aligned deposition process allows for uninterrupted formation of electrodes and insulating layers in a continuous sequence, improving productivity while maintaining precision through the inherent alignment of the deposition process.
3Manufacturing precision
If masks are used to form electrodes and insulating layers, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates masks, which are expensive consumable components requiring precise fabrication and handling. By removing this cost center while using self-aligned deposition, the invention reduces material costs and processing costs associated with mask management.
Solution Approach 2:
The patent replaces expensive, reusable masks with inexpensive, single-use deposition patterns or self-aligned formation methods. This substitution eliminates the need for costly mask fabrication, storage, and disposal infrastructure, reducing overall manufacturing costs while maintaining precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and enhances productivity by simplifying the manufacturing process without compromising the functionality of the display device.
Implementation Method 1
a second electrode (or first and second electrodes) are formed by doping a dopant into amorphous silicon
Data Source
AI summary
A display device includes: a first alignment electrode and a second alignment electrode on a substrate, the first and second alignment electrodes extending in a first direction and being spaced apart from each other; an amorphous silicon layer on the first alignment electrode and the second alignment electrode, the amorphous silicon layer having an insulating portion covering the first alignment electrode and an electrode portion covering the second alignment electrode, the electrode portion of the amorphous silicon layer including an N-type dopant; a light emitting element on the amorphous silicon layer, one end of the light emitting element being on the insulating portion and another end of the light emitting element contacting the electrode portion of the amorphous silicon layer; a first insulating layer on the light emitting element and extending in the first direction; and a first electrode contacting the one end of the light emitting element.


