Amorphous Silicon Micro Structures Low Temperature Fabrication

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Solution Overview

Problem

The fabrication of microelectromechanical devices (MEMS) faces challenges such as heat damage to CMOS circuits from high-temperature processing steps and the need for low optical reflectivity and minimal mechanical stress in micro structures like tiltable mirrors, which existing methods struggle to address effectively.

Innovation Solution

A method involving the deposition of amorphous silicon over a substrate with a CMOS circuit at temperatures below 550°C, using specific gas flow rates and RF power to achieve electrical conductivity, mechanical stress within a certain range, and low reflectance, allowing for the formation of tiltable micro mirrors with minimal optical noise and enhanced contrast.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional high-temperature processing steps are used to fabricate micro structures, then the micro structures can achieve required mechanical and electrical properties, but the CMOS circuits in the substrate suffer heat damage

Engineering Contradiction:
Improveintegrity of CMOS circuitsVSAvoidprocessing temperature
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent changes the processing temperature parameter from conventional high temperatures (above 500°C) to low temperatures (below 550°C, preferably 200-450°C). This parameter change allows the fabrication of micro structures with required mechanical and electrical properties while preventing heat damage to CMOS circuits in the substrate

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces conventional thermal processing methods with plasma-enhanced chemical vapor deposition (PECVD) technology. This substitution enables film deposition and material formation at lower temperatures while maintaining the required material properties, thus protecting the CMOS circuits from thermal damage

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Illumination intensity

If conventional materials and methods are used for micro structures, then fabrication is straightforward, but the micro structures exhibit high optical reflectivity and scattering that create optical noise and reduce image contrast

Engineering Contradiction:
Improveoptical contrast and reflectance controlVSAvoidoptical noise from reflections and scatterings
Core Design Contradiction:
Illumination intensityVSObject-generated harmful factors

Solution Approach 1:

The patent changes the optical parameters of the micro structure surfaces by depositing amorphous silicon films with controlled thickness and density. This results in surfaces with low reflectivity and minimal scattering, reducing optical noise and enhancing image contrast in applications such as tiltable micro mirrors

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses amorphous silicon as a coating material on micro structure surfaces to achieve desired optical properties. The amorphous silicon layer provides both electrical conductivity and low optical reflectivity, creating a composite structure that simultaneously addresses electrical and optical requirements

Inventive Principle:
Principle #40Composite materials

3Reliability

If conventional deposition methods are used for amorphous silicon, then deposition can be achieved, but the deposited layer has poor electrical conductivity and high mechanical stress

Engineering Contradiction:
Improveelectrical conductivity and mechanical stress controlVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent optimizes multiple deposition parameters including temperature (200-450°C), pressure (1-10 Torr), gas composition (SiH4, PH3, He), and RF power (50-1200 Watts). These parameter changes result in amorphous silicon films with improved electrical conductivity (0.1-100 Ω−1 cm−1) and controlled mechanical stress (between -250 MPa and 250 MPa), eliminating the need for additional doping or stress-relief processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses plasma-enhanced chemical vapor deposition (PECVD) instead of conventional thermal CVD or physical vapor deposition methods. This substitution enables simultaneous control of electrical conductivity and mechanical stress through plasma chemistry and process parameters, achieving dual property optimization in a single deposition step

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents heat damage to CMOS circuits, enables electrically conductive micro structures, and achieves low optical reflectivity and minimal mechanical stress, improving the fabrication of micro structures like tiltable mirrors for applications in spatial light modulators.

Implementation Method 1

depositing amorphous silicon in a processing chamber at a temperature of between about 150° and about 400°, a pressure of 1 to 10 Torr, SiH4 gas flow at a rate in the range of 20-300 sccm, PH3 gas flow at a rate in the range of 20-500 sccm, Helium gas flow at a rate in the range of 2000-10000 sccm, and a RF power of 50-1200 Watts

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

depositing amorphous silicon by PECVD in a processing chamber

Methodology Applied
Scientific EffectPlasma Enhanced Chemical Vapour Deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS7821010B2Low temperature fabrication of conductive micro structures
Publication Date: 2010.10.26 SPATIAL PHOTONICS INC
  • US7821010B2 patent drawing
  • US7821010B2 patent drawing
  • US7821010B2 patent drawing

AI summary

A method of fabricating a micro structure includes depositing amorphous silicon over a substrate having an electric circuit at a temperature below 550° C. to form a first structure portion, wherein at least part of the first structure portion is configured to receive an electrical signal from the electric circuit.