Amorphous Silicon-Containing Resistive Switching Devices
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current resistance-switching semiconductor devices face challenges in scalability, high power consumption, cycle fatigue, and compatibility with silicon-based semiconductor industry, particularly for non-volatile memory applications at the 22 nm scale.
Innovation Solution
The development of resistive devices with an amorphous layer comprising an electrically conducting composition and an electrically insulating silicon-containing composition, where the conducting composition makes up 5-40% of the layer, and two electrodes in contact, enabling stable non-volatile resistance switching without continuous voltage or current application, using techniques like co-sputtering and UV reset.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional EPIR resistance-switching devices are used, then resistance switching can be achieved, but power consumption is high and cycle fatigue performance is poor
Solution Approach 1:
The patent changes the fundamental switching mechanism from voltage-triggered EPIR effect to light-triggered photoconductive effect. This parameter change in the triggering mechanism enables low-power operation since the photoconductive switching occurs naturally upon light absorption without requiring high voltage pulses, thereby reducing power consumption while improving cycle fatigue performance through non-destructive optical switching
Solution Approach 2:
The patent replaces the electrical voltage-based switching mechanism with an optical field-based mechanism. By using light to induce photoconductive effects in the amorphous semiconductor layer, the system substitutes electrical mechanical stress (high voltage pulses) with optical energy, achieving switching without the harmful effects of high power electrical pulses on device durability
2Use of energy by moving object
If perovskite materials are used for resistive switching, then lower power consumption is achieved, but compatibility with silicon-based semiconductor industry is lost
Solution Approach 1:
The patent changes the material phase from crystalline perovskite to amorphous semiconductor. This parameter change in structural order enables the material to be deposited using standard sputtering techniques compatible with CMOS fabrication, while maintaining the photoconductive properties necessary for low-power optical switching operation
Solution Approach 2:
The patent employs composite material structures including amorphous semiconductor layers combined with transparent conductive oxide electrodes and dielectric layers. This composite approach integrates the photoconductive functionality with CMOS-compatible fabrication processes, allowing low-power optical switching to be manufactured using existing semiconductor industry techniques
3Reliability
If metal oxide devices are used for resistive switching, then switching functionality is achieved, but scalability to nanoscale dimensions is limited
Solution Approach 1:
The patent utilizes thin film structures with precise thickness control at the nanometer scale. The amorphous semiconductor layer is deposited as a thin film that can be precisely controlled in thickness, enabling scalable device dimensions down to nanoscale while maintaining reliable photoconductive switching functionality through optimized film morphology and composition
Solution Approach 2:
The patent transitions from bulk metal oxide materials to two-dimensional thin film structures. This dimensional change enables better control over electrical and optical properties through thickness engineering, allowing the devices to scale to nanoscale dimensions while maintaining switching functionality through surface-dominated transport mechanisms
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These devices achieve low power consumption, high stability, and scalability for nanoscale non-volatile memory applications, with the ability to switch between resistance states repeatedly without loss of switching time or stability, and compatibility with CMOS processes.
Implementation Method 1
Application of an electrical stimulus in a magnetic field to some perovskite family thin films shows useful resistive switching properties
Implementation Method 2
These devices achieve low power consumption, high stability, and scalability for nanoscale non-volatile memory applications, with the ability to switch between resistance states repeatedly without loss of switching time or stability
Data Source
AI summary
Disclosed herein is a resistive switching device having an amorphous layer comprised of an insulating silicon-containing material and a conducting material. The amorphous layer may be disposed between two or more electrodes and be capable of switching between at least two resistance states. Circuits and memory devices including resistive switching devices are also disclosed, and a composition of matter involving an insulating silicon-containing material and a conducting material comprising between 5 and 40 percent by molar percentage of the composition is disclosed herein as well. Also disclosed herein are methods for switching the resistance of an amorphous material.